公开(公告)号：US10722729B2

公开(公告)日：2020-07-28

申请号：US15403651

申请日：2017-01-11

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hariklia Deligianni ,  Shu-Jen Han ,  Edmund J. Sprogis

IPC: A61N5/06 ,  A61B5/04

Abstract: A neural probe is presented for local neural optogenetics stimulation and neurochemistry recordings. The neural probe includes a probe body, a shank extending from the probe body to a tip, a plurality of micro light-emitting diodes (LEDs) positioned across a length of a first surface of the shank for providing neuron-affecting light, a plurality of carbon devices, and a plurality of carbon electrodes positioned across a length of a second surface of the shank, the second surface in opposed relation to the first surface. The plurality of carbon electrodes can be vertically aligned carbon nanotubes or vertically aligned carbon nanofibers. The plurality of carbon electrodes can also be horizontally aligned carbon nanotubes. The plurality of micro LEDs activate neurons and the plurality of vertically aligned carbon electrodes electrochemically record neurotransmitters.

公开(公告)号：US20180193663A1

公开(公告)日：2018-07-12

申请号：US15403651

申请日：2017-01-11

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hariklia Deligianni ,  Shu-Jen Han ,  Edmund J. Sprogis

IPC: A61N5/06 ,  A61B5/04

Abstract: A neural probe is presented for local neural optogenetics stimulation and neurochemistry recordings. The neural probe includes a probe body, a shank extending from the probe body to a tip, a plurality of micro light-emitting diodes (LEDs) positioned across a length of a first surface of the shank for providing neuron-affecting light, a plurality of carbon devices, and a plurality of carbon electrodes positioned across a length of a second surface of the shank, the second surface in opposed relation to the first surface. The plurality of carbon electrodes can be vertically aligned carbon nanotubes or vertically aligned carbon nanofibers. The plurality of carbon electrodes can also be horizontally aligned carbon nanotubes. The plurality of micro LEDs activate neurons and the plurality of vertically aligned carbon electrodes electrochemically record neurotransmitters.

公开(公告)号：US10396665B2

公开(公告)日：2019-08-27

申请号：US15713937

申请日：2017-09-25

Applicant: International Business Machines Corporation

Inventor： Hariklia Deligianni ,  Devendra K. Sadana ,  Edmund J. Sprogis ,  Naigang Wang

IPC: H01L21/00 ,  H01L27/00 ,  H01L29/00 ,  H02M3/158 ,  H01L21/768 ,  H01L21/762 ,  H01L21/84 ,  H01L23/535 ,  H01L29/201 ,  H01L27/12 ,  H01L21/8258 ,  H01L23/522 ,  H02M3/00 ,  H01L23/00 ,  H01L27/085

Abstract: Fully integrated, on-chip DC-DC power converters are provided. In one aspect, a DC-DC power converter includes: a SOI wafer having a SOI layer separated from a substrate by a buried insulator, wherein the SOI layer and the buried insulator are selectively removed from at least one first portion of the SOI wafer, and wherein the SOI layer and the buried insulator remain present in at least one second portion of the SOI wafer; at least one GaN transistor formed on the substrate in the first portion of the SOI wafer; at least one CMOS transistor formed on the SOI layer in the second portion of the SOI wafer; a dielectric covering the GaN and CMOS transistors; and at least one magnetic inductor formed on the dielectric. A method of forming a fully integrated DC-DC power converter is also provided.

公开(公告)号：US20180034369A1

公开(公告)日：2018-02-01

申请号：US15713937

申请日：2017-09-25

Applicant: International Business Machines Corporation

Inventor： Hariklia Deligianni ,  Devendra K. Sadana ,  Edmund J. Sprogis ,  Naigang Wang

IPC: H02M3/158 ,  H01L21/762 ,  H01L21/84 ,  H01L23/535 ,  H01L29/201 ,  H01L27/12 ,  H01L21/768

CPC classification number: H02M3/158 ,  H01L21/7624 ,  H01L21/76243 ,  H01L21/76895 ,  H01L21/8258 ,  H01L21/84 ,  H01L23/5227 ,  H01L23/535 ,  H01L24/13 ,  H01L27/085 ,  H01L27/1203 ,  H01L27/1207 ,  H01L29/201 ,  H01L2224/0401 ,  H01L2224/05569 ,  H01L2224/131 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/19104 ,  H02M3/00 ,  Y02B70/1483 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Fully integrated, on-chip DC-DC power converters are provided. In one aspect, a DC-DC power converter includes: a SOI wafer having a SOI layer separated from a substrate by a buried insulator, wherein the SOI layer and the buried insulator are selectively removed from at least one first portion of the SOI wafer, and wherein the SOI layer and the buried insulator remain present in at least one second portion of the SOI wafer; at least one GaN transistor formed on the substrate in the first portion of the SOI wafer; at least one CMOS transistor formed on the SOI layer in the second portion of the SOI wafer; a dielectric covering the GaN and CMOS transistors; and at least one magnetic inductor formed on the dielectric. A method of forming a fully integrated DC-DC power converter is also provided.

公开(公告)号：US09331141B2

公开(公告)日：2016-05-03

申请号：US13773014

申请日：2013-02-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Paul S. Andry ,  Edmund J. Sprogis ,  Cornelia K. Tsang

IPC: H01L29/06 ,  H01L21/20 ,  H01L21/683 ,  H01L21/762 ,  H01L21/822 ,  H01L27/06

CPC classification number: H01L29/06 ,  H01L21/2007 ,  H01L21/6835 ,  H01L21/76251 ,  H01L21/8221 ,  H01L27/0688 ,  H01L2221/68368 ,  H01L2221/68381 ,  H01L2924/00011 ,  H01L2224/80001

Abstract: CMOS structures with a replacement substrate and methods of manufacture are disclosed herein. The method includes forming a device on a temporary substrate. The method further includes removing the temporary substrate. The method further includes bonding a permanent electrically insulative substrate to the device with a bonding structure.

Abstract translation: 具有替代衬底的CMOS结构和制造方法在本文中公开。 该方法包括在临时衬底上形成器件。 该方法还包括移除临时衬底。 所述方法还包括用固定结构将永久电绝缘衬底粘合到所述器件上。

公开(公告)号：US10032750B2

公开(公告)日：2018-07-24

申请号：US15196884

申请日：2016-06-29

Applicant: International Business Machines Corporation

Inventor： Hariklia Deligianni ,  Devendra K. Sadana ,  Edmund J. Sprogis ,  Naigang Wang

IPC: H01L23/48 ,  H01L25/065 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/48 ,  H01L49/02

Abstract: DC-DC power converters with GaN switches, magnetic inductors and CMOS power drivers integrated through face-to-face wafer bonding techniques are provided. In one aspect, an integrated DC-DC power converter includes: a Si CMOS chip having at least one Si CMOS transistor formed thereon; a GaN switch chip, bonded to the Si CMOS chip in a face-to-face manner, having at least one GaN transistor formed thereon; and an on-chip magnetic inductor present either on the Si CMOS chip or on the GaN switch chip. A method of forming an integrated DC-DC power converter is also provided.

公开(公告)号：US09806615B1

公开(公告)日：2017-10-31

申请号：US15185807

申请日：2016-06-17

Applicant: International Business Machines Corporation

Inventor： Hariklia Deligianni ,  Devendra K. Sadana ,  Edmund J. Sprogis ,  Naigang Wang

IPC: H01L21/00 ,  H01L27/00 ,  H01L29/00 ,  H02M3/15 ,  H02M3/158 ,  H01L27/12 ,  H01L29/201 ,  H01L23/535 ,  H01L21/84 ,  H01L21/762 ,  H01L21/768

CPC classification number: H02M3/158 ,  H01L21/76243 ,  H01L21/76895 ,  H01L21/8258 ,  H01L21/84 ,  H01L23/5227 ,  H01L23/535 ,  H01L24/13 ,  H01L27/085 ,  H01L27/1203 ,  H01L27/1207 ,  H01L29/201 ,  H01L2224/0401 ,  H01L2224/05569 ,  H01L2224/131 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/19104 ,  H02M3/00 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Fully integrated, on-chip DC-DC power converters are provided. In one aspect, a DC-DC power converter includes: a SOI wafer having a SOI layer separated from a substrate by a buried insulator, wherein the SOI layer and the buried insulator are selectively removed from at least one first portion of the SOI wafer, and wherein the SOI layer and the buried insulator remain present in at least one second portion of the SOI wafer; at least one GaN transistor formed on the substrate in the first portion of the SOI wafer; at least one CMOS transistor formed on the SOI layer in the second portion of the SOI wafer; a dielectric covering the GaN and CMOS transistors; and at least one magnetic inductor formed on the dielectric. A method of forming a fully integrated DC-DC power converter is also provided.

公开(公告)号：US09613842B2

公开(公告)日：2017-04-04

申请号：US14183989

申请日：2014-02-19

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John J. Garant ,  Jonathan H. Griffith ,  Brittany L. Hedrick ,  Edmund J. Sprogis

IPC: H01L21/00 ,  B32B37/00 ,  B32B38/00 ,  H01L21/683 ,  B32B37/24 ,  B32B38/10

CPC classification number: H01L21/6835 ,  B32B37/24 ,  B32B38/10 ,  B32B2037/246 ,  B32B2315/08 ,  B32B2457/14 ,  B81C1/00666 ,  B81C2201/0167 ,  H01L2221/68304 ,  H01L2221/68327

Abstract: A wafer handler with a removable bow compensating layer and methods of manufacture is disclosed. The method includes forming at least one layer of stressed material on a front side of a wafer handler. The method further includes forming another stressed material on a backside of the wafer handler which counter balances the at least one layer of stressed material on the front side of the wafer handler, thereby decreasing an overall bow of the wafer handler.

公开(公告)号：US20130344675A1

公开(公告)日：2013-12-26

申请号：US13975519

申请日：2013-08-26

Applicant: International Business Machines Corporation

Inventor： Tae Hong Kim ,  Michael F. McAllister ,  Michael J. Shapiro ,  Edmund J. Sprogis

IPC: H01L49/02

CPC classification number: H01L28/40 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/642 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/13025 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00

Abstract: A capacitor in a semiconductor substrate employs a conductive through-substrate via (TSV) as an inner electrode and a columnar doped semiconductor region as an outer electrode. The capacitor provides a large decoupling capacitance in a small area, and does not impact circuit density or a Si3D structural design. Additional conductive TSV's can be provided in the semiconductor substrate to provide electrical connection for power supplies and signal transmission therethrough. The capacitor has a lower inductance than a conventional array of capacitors having comparable capacitance, thereby enabling reduction of high frequency noise in the power supply system of stacked semiconductor chips.

Abstract translation: 半导体衬底中的电容器采用导电贯穿衬底通孔（TSV）作为内部电极和柱状掺杂半导体区域作为外部电极。 电容器在小面积上提供大的去耦电容，并且不影响电路密度或Si3D结构设计。 可以在半导体衬底中提供附加的导电TSV，以提供用于电源和通过其的信号传输的电连接。 电容器具有比具有相当电容的传统电容器阵列更低的电感，从而能够降低层叠半导体芯片的电源系统中的高频噪声。

公开(公告)号：US10134577B2

公开(公告)日：2018-11-20

申请号：US14718747

申请日：2015-05-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Richard F. Indyk ,  Deepika Priyadarshini ,  Spyridon Skordas ,  Edmund J. Sprogis ,  Anthony K. Stamper ,  Kevin R. Winstel

IPC: H01L21/02 ,  B32B3/02 ,  B32B3/30 ,  B32B7/12

Abstract: Edge trim processes in 3D integrated circuits and resultant structures are provided. The method includes trimming an edge of a wafer at an angle to form a sloped sidewall. The method further includes attaching the wafer to a carrier wafer with a smaller diameter lower portion of the wafer bonded to the carrier wafer. The method further includes thinning the wafer while it is attached to the wafer.