公开(公告)号：US20130075861A1

公开(公告)日：2013-03-28

申请号：US13625889

申请日：2012-09-25

Applicant: Infineon Technologies AG

Inventor： Martin Kerber ,  Matthias Stecher

IPC: H01L27/06

CPC classification number: H01L29/402 ,  H01F27/2804 ,  H01L23/5227 ,  H01L23/585 ,  H01L24/05 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2924/3025 ,  H01L2924/00

Abstract: One or more embodiments relate to a semiconductor structure, comprising: a conductive feature; an outer guard ring; and an inner guard ring between the outer guard ring and the conductive feature, the inner guard ring being electrically coupled to the conductive feature.

公开(公告)号：US11222812B2

公开(公告)日：2022-01-11

申请号：US16008094

申请日：2018-06-14

Applicant: Infineon Technologies AG

Inventor： Matthias Stecher

IPC: H01L21/768 ,  H01L21/288 ,  H01L21/3205 ,  H01L21/02 ,  H01L23/532 ,  H01L23/528 ,  H01L23/522

Abstract: One or more embodiments are related to a semiconductor device, comprising: a metallization layer comprising a plurality of portions, each of the portions having a different thickness. The metallization layer may be a final metal layer.

公开(公告)号：US20180301414A1

公开(公告)日：2018-10-18

申请号：US16008094

申请日：2018-06-14

Applicant: Infineon Technologies AG

Inventor： Matthias Stecher

IPC: H01L23/528 ,  H01L23/532 ,  H01L21/768 ,  H01L23/522 ,  H01L21/3205 ,  H01L21/288

Abstract: One or more embodiments are related to a semiconductor device, comprising: a metallization layer comprising a plurality of portions, each of the portions having a different thickness. The metallization layer may be a final metal layer.

公开(公告)号：US10002830B2

公开(公告)日：2018-06-19

申请号：US15054318

申请日：2016-02-26

Applicant: Infineon Technologies AG

Inventor： Matthias Stecher

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/522 ,  H01L21/288 ,  H01L21/3205 ,  H01L23/532

CPC classification number: H01L23/5283 ,  H01L21/2885 ,  H01L21/32051 ,  H01L21/76807 ,  H01L21/76838 ,  H01L21/7685 ,  H01L21/76852 ,  H01L21/76871 ,  H01L21/76873 ,  H01L21/76879 ,  H01L21/76885 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L2924/0002 ,  H01L2924/00

Abstract: One or more embodiments are related to a semiconductor device, comprising: a metallization layer comprising a plurality of portions, each of the portions having a different thickness. The metallization layer may be a final metal layer.

公开(公告)号：US09953968B2

公开(公告)日：2018-04-24

申请号：US14628823

申请日：2015-02-23

Applicant: Infineon Technologies AG

Inventor： Yiqun Cao ,  Ulrich Glaser ,  Magnus-Maria Hell ,  Julien Lebon ,  Michael Mayerhofer ,  Andreas Meiser ,  Matthias Stecher ,  Joost Willemen

IPC: H02H9/04 ,  H01L27/02

CPC classification number: H01L27/0255 ,  H01L27/0292 ,  H02H9/046

Abstract: An integrated circuit having an ESD protection structure is described. One embodiment includes a circuit section interconnected with a first terminal and with a second terminal and being operable at voltage differences between the first terminal and second terminal of greater than +10 V and less than −10 V. The integrated circuit additionally includes an ESD protection structure operable to protect the circuit section against electrostatic discharge between the first terminal and the second terminal. The ESD protection structure is operable with voltage differences between the first and second terminals of greater than +10 V and less than −10 V without triggering. The ESD protection structure is electrically and optically coupled to a photon source such that photons emitted by the photon source upon ESD pulse loading are absorbable in the ESD protection structure and an avalanche breakdown is initiatable by electron-hole pairs generated by the absorbed photons.

公开(公告)号：US09263619B2

公开(公告)日：2016-02-16

申请号：US14020391

申请日：2013-09-06

Applicant: Infineon Technologies AG

Inventor： Joost Willemen ,  Michael Mayerhofer ,  Ulrich Glaser ,  Yiqun Cao ,  Andreas Meiser ,  Magnus-Maria Hell ,  Matthias Stecher ,  Julien Lebon

IPC: H01L27/15 ,  H01L31/173 ,  H01L27/02

CPC classification number: H01L31/173 ,  H01L27/0255 ,  H01L27/0629 ,  H01L27/15 ,  H01L29/808 ,  H02H3/20

Abstract: A semiconductor component includes an auxiliary semiconductor device configured to emit radiation. The semiconductor component further includes a semiconductor device. An electrical coupling and an optical coupling between the auxiliary semiconductor device and the semiconductor device are configured to trigger emission of radiation by the auxiliary semiconductor device and to trigger avalanche breakdown in the semiconductor device by absorption of the radiation in the semiconductor device. The semiconductor device includes a pn junction between a first layer of a first conductivity type buried below a surface of a semiconductor body and a doped semiconductor region of a second conductivity type disposed between the surface and the first layer.

Abstract translation: 半导体部件包括被配置为发射辐射的辅助半导体器件。 半导体部件还包括半导体器件。 辅助半导体器件和半导体器件之间的电耦合和光耦合被配置为触发辅助半导体器件的辐射发射，并通过吸收半导体器件中的辐射来触发半导体器件中的雪崩击穿。 半导体器件包括埋在半导体主体的表面下方的第一导电类型的第一层和布置在表面和第一层之间的第二导电类型的掺杂半导体区域之间的pn结。

公开(公告)号：US20150255551A1

公开(公告)日：2015-09-10

申请号：US14700203

申请日：2015-04-30

Applicant: Infineon Technologies AG

Inventor： Martin Kerber ,  Matthias Stecher

IPC: H01L29/40

CPC classification number: H01L29/402 ,  H01F27/2804 ,  H01L23/5227 ,  H01L23/585 ,  H01L24/05 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2924/3025 ,  H01L2924/00

Abstract: One or more embodiments relate to a semiconductor structure, comprising: a conductive feature; an outer guard ring; and an inner guard ring between the outer guard ring and the conductive feature, the inner guard ring being electrically coupled to the conductive feature.

Abstract translation: 一个或多个实施例涉及半导体结构，包括：导电特征; 外护环; 以及在所述外保护环和所述导电特征之间的内保护环，所述内保护环电耦合到所述导电特征。

公开(公告)号：US09048019B2

公开(公告)日：2015-06-02

申请号：US13625889

申请日：2012-09-25

Applicant: Infineon Technologies AG

Inventor： Martin Kerber ,  Matthias Stecher

IPC: H01L21/02 ,  H01F27/28 ,  H01L23/522 ,  H01L23/58 ,  H01L23/00

CPC classification number: H01L29/402 ,  H01F27/2804 ,  H01L23/5227 ,  H01L23/585 ,  H01L24/05 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2924/3025 ,  H01L2924/00

Abstract: One or more embodiments relate to a semiconductor structure, comprising: a conductive feature; an outer guard ring; and an inner guard ring between the outer guard ring and the conductive feature, the inner guard ring being electrically coupled to the conductive feature.

Abstract translation: 一个或多个实施例涉及半导体结构，包括：导电特征; 外护环; 以及在所述外保护环和所述导电特征之间的内保护环，所述内保护环电耦合到所述导电特征。

公开(公告)号：US20140287560A1

公开(公告)日：2014-09-25

申请号：US14299344

申请日：2014-06-09

Applicant: Infineon Technologies AG

Inventor： Matthias Stecher ,  Hans Weber ,  Lincoln O'Riain ,  Birgit von Ehrenwall

IPC: H01L27/12

CPC classification number: H01L27/1207 ,  H01L21/187 ,  H01L21/743 ,  H01L21/76283 ,  H01L27/0251 ,  H01L27/1203 ,  H01L29/04 ,  H01L29/0878 ,  H01L29/1087 ,  H01L29/66681 ,  H01L29/7816

Abstract: An integrated semiconductor device is provided. The integrated semiconductor device has a first semiconductor region of a second conductivity type, a second semiconductor region of a first conductivity type forming a pn-junction with the first semiconductor region, a non-monocrystalline semiconductor layer of the first conductivity type arranged on the second semiconductor region, a first well and at least one second well of the first conductivity type arranged on the non-monocrystalline semiconductor layer and an insulating structure insulating the first well from the at least one second well and the non-monocrystalline semiconductor layer. Further, a method for forming a semiconductor device is provided.

Abstract translation: 提供集成半导体器件。 集成半导体器件具有第二导电类型的第一半导体区域，与第一半导体区域形成pn结的第一导电类型的第二半导体区域，布置在第二导电类型的第二导电类型的非单晶半导体层 半导体区域，布置在非单晶半导体层上的第一导电类型的第一阱和至少一个第二阱以及使第一阱与至少一个第二阱和非单晶半导体层绝缘的绝缘结构。 此外，提供了一种用于形成半导体器件的方法。

公开(公告)号：US20130328197A1

公开(公告)日：2013-12-12

申请号：US13966320

申请日：2013-08-14

Applicant: Infineon Technologies AG

Inventor： Khalil Hosseini ,  Matthias Stecher

IPC: H01L23/532

CPC classification number: H01L24/48 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/81 ,  H01L24/85 ,  H01L2224/0347 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/73257 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85375 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/00014 ,  H01L2224/05164 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2924/2075 ,  H01L2924/00012 ,  H01L2924/01006

Abstract: An electronic device and method for production is disclosed. One embodiment provides an integrated component having a first layer which is composed of copper or a copper alloy or which contains copper or a copper alloy, and having an electrically conductive second layer, whose material differs from the material of the first layer, and a connection apparatus which is arranged on the first layer and on the second layer.

Abstract translation: 公开了一种用于生产的电子设备和方法。 一个实施例提供了一种集成部件，其具有由铜或铜合金构成的第一层或者包含铜或铜合金的第一层，并且具有导电的第二层，其材料与第一层的材料不同， 设置在第一层和第二层上。