公开(公告)号：US20240322697A1

公开(公告)日：2024-09-26

申请号：US18124223

申请日：2023-03-21

Applicant: Infineon Technologies AG

Inventor： Waldemar Jakobi ,  Christoph Koch ,  Tomas Manuel Reiter ,  Christian Schweikert

IPC: H02M3/335 ,  H01L23/495 ,  H02M7/00

CPC classification number: H02M3/33571 ,  H01L23/4951 ,  H01L23/49555 ,  H01L23/49562 ,  H02M7/003

Abstract: A power semiconductor module includes: an electrically insulative frame; half bridge circuits housed in the electrically insulative frame, each half bridge circuit including one or more high-side power semiconductor dies and one or more low-side power semiconductor dies; a first structured metal frame embedded in the electrically insulative frame and electrically connected to a drain or collector terminal of the one or more high-side power semiconductor dies of each half bridge circuit; a second structured metal frame embedded in the electrically insulative frame and electrically connected to a source or emitter terminal of the one or more low-side power semiconductor dies of each half bridge circuit; and first openings in the electrically insulative frame that expose part of the first structured metal frame or part of the second structured metal frame at opposing first and second sidewalls of the electrically insulative frame and between adjacent ones of the half bridge circuits.

公开(公告)号：US11799026B2

公开(公告)日：2023-10-24

申请号：US17181408

申请日：2021-02-22

Applicant: Infineon Technologies AG

Inventor： Dethard Peters ,  Sascha Axel Baier ,  Tomas Manuel Reiter ,  Sandeep Walia ,  Frank Wolter

IPC: H01L29/78 ,  G01R31/52 ,  G01K7/16 ,  G01R31/26 ,  G01R31/27 ,  G01R31/28 ,  H01L29/16

CPC classification number: H01L29/7815 ,  G01K7/16 ,  G01R31/2628 ,  G01R31/27 ,  G01R31/2831 ,  G01R31/52 ,  H01L29/1608 ,  H01L29/7805 ,  H01L29/7813

Abstract: A semiconductor die includes: a SiC substrate; power and current sense transistors integrated in the substrate such that the current sense transistor mirrors current flow in the main power transistor; a gate terminal electrically connected to gate electrodes of both transistors; a drain terminal electrically connected to a drain region in the substrate and which is common to both transistors; a source terminal electrically connected to source and body regions of the power transistor; a dual mode sense terminal; and a doped resistor region in the substrate between the transistors. The dual mode sense terminal is electrically connected to source and body regions of the current sense transistor. The doped resistor region has a same conductivity type as the body regions of both transistors and is configured as a temperature sense resistor that electrically connects the source terminal to the dual mode sense terminal.

公开(公告)号：US11502064B2

公开(公告)日：2022-11-15

申请号：US17177395

申请日：2021-02-17

Applicant: Infineon Technologies AG

Inventor： Tomas Manuel Reiter ,  Christoph Koch ,  Mark Nils Muenzer

IPC: H01L23/057 ,  H01L23/50 ,  H01L27/06 ,  H01L25/07 ,  H01L43/06 ,  H02P27/06 ,  H01L21/48 ,  H01L25/00

Abstract: Described is a power semiconductor module that includes: a frame made of an electrically insulative material; a first substrate seated in the frame; a plurality of power semiconductor dies attached to the first substrate; a plurality of signal pins attached to the first substrate and electrically connected to the power semiconductor dies; a busbar extending from the first substrate through a side face of the frame; a current sensor module seated in a receptacle of the frame in sensing proximity of the busbar, the current sensor module including a current sensor attached to a circuit board; and a potting material fixing the current sensor module to the frame such that no air gap is present between the current sensor and the busbar. The potting material contacts the frame and the current sensor. Methods of producing the power semiconductor module are also described.

公开(公告)号：US10998132B1

公开(公告)日：2021-05-04

申请号：US16654622

申请日：2019-10-16

Applicant: Infineon Technologies AG ,  TDK Electronics AG

Inventor： Tomas Manuel Reiter ,  Karl Niklas

IPC: H05K7/00 ,  H01G2/00 ,  H01R12/55 ,  H05K5/02

Abstract: A capacitor includes an electrically insulating housing that encloses an interior volume, first and second conductive connection pads that are each configured as externally accessible points of electrical contact to internal electrodes of the capacitor that are disposed within the housing, and an active capacitor dielectric material disposed within the housing and being configured as a dielectric medium between the internal electrodes, the first conductive connection pad having a first planar contact surface that is substantially parallel to a first sidewall of the housing, the second conductive connection pad having a second planar contact surface that is substantially parallel to the first sidewall, the first and second planar contact surfaces being offset from one another in a direction that is orthogonal to the first sidewall.

公开(公告)号：US10784183B2

公开(公告)日：2020-09-22

申请号：US16207001

申请日：2018-11-30

Applicant: Infineon Technologies AG

Inventor： Pawan Garg ,  Mathias Kiele-Dunsche ,  Tomas Manuel Reiter ,  Christopher Roemmelmayer

IPC: H01L23/40 ,  H01L23/498 ,  H01L21/52 ,  H01L23/544

Abstract: A semiconductor package includes a semiconductor module, a first package extension frame, a second package extension frame, and a plurality of fasteners. The semiconductor module includes a first side surface, a second side surface, a first major surface, and a second major surface on an opposite side of the semiconductor module from the first major surface. The first package extension frame is configured to attach to the first side surface. The second package extension frame is configured to attach to the second side surface. The plurality of fasteners are configured to mechanically couple the first package extension frame and the second package extension frame to one or more of a circuit board arranged on the first major surface and/or a heat sink arranged on the second major surface.

公开(公告)号：US12014963B2

公开(公告)日：2024-06-18

申请号：US17362088

申请日：2021-06-29

Applicant: Infineon Technologies AG

Inventor： Tomas Manuel Reiter ,  Peter Bayer ,  Christoph Koch

IPC: H01L23/053 ,  H01L23/14 ,  H01L23/495 ,  H01L23/528 ,  H05K3/40 ,  H05K3/32

CPC classification number: H01L23/053 ,  H01L23/145 ,  H01L23/49503 ,  H01L23/5286 ,  H05K3/40 ,  H05K3/32

Abstract: A power semiconductor module includes: an electrically insulative frame having opposite first and second mounting sides, and a border that defines a periphery of the electrically insulative frame; a first substrate seated in the electrically insulative frame; a plurality of power semiconductor dies attached to the first substrate; a plurality of signal pins attached to the first substrate and electrically connected to the power semiconductor dies; a plurality of busbars attached to the first substrate and extending through the border of the electrically insulative frame; a plurality of fixing positions at the first mounting side of the electrically insulative frame; and a plurality of electrically insulative protrusions jutting out from the second mounting side of the electrically insulative frame, wherein the protrusions are vertically aligned with the fixing positions. Methods of producing the power semiconductor module and power electronic assemblies that incorporate the power semiconductor module are also described.

公开(公告)号：US20220262773A1

公开(公告)日：2022-08-18

申请号：US17177395

申请日：2021-02-17

Applicant: Infineon Technologies AG

Inventor： Tomas Manuel Reiter ,  Christoph Koch ,  Mark Nils Muenzer

IPC: H01L25/07 ,  H01L23/057 ,  H01L23/50 ,  H01L43/06 ,  H01L21/48 ,  H01L25/00

Abstract: Described is a power semiconductor module that includes: a frame made of an electrically insulative material; a first substrate seated in the frame; a plurality of power semiconductor dies attached to the first substrate; a plurality of signal pins attached to the first substrate and electrically connected to the power semiconductor dies; a busbar extending from the first substrate through a side face of the frame; a current sensor module seated in a receptacle of the frame in sensing proximity of the busbar, the current sensor module including a current sensor attached to a circuit board; and a potting material fixing the current sensor module to the frame such that no air gap is present between the current sensor and the busbar. The potting material contacts the frame and the current sensor. Methods of producing the power semiconductor module are also described.

公开(公告)号：US11316292B2

公开(公告)日：2022-04-26

申请号：US16673401

申请日：2019-11-04

Applicant: Infineon Technologies AG

Inventor： Tomas Manuel Reiter ,  Mark Nils Muenzer ,  Marco Stallmeister

IPC: H01R13/05 ,  H01L23/538 ,  H01L23/00 ,  H01R13/24

Abstract: A semiconductor power module includes an electrically conductive carrier plate, a power semiconductor chip arranged on the carrier plate and electrically connected to the carrier plate, and a contact pin electrically connected to the carrier plate and forming an outer contact of the semiconductor power module. The contact pin is arranged above a soldering point. The soldering point is configured to mechanically directly or indirectly fix the contact pin on the carrier plate and to electrically connect the contact pin to the carrier plate. The contact pin is electrically connected to the carrier plate via a further connection. The further connection has a portion which is mechanically flexible in relation to the carrier plate.

公开(公告)号：US20220093486A1

公开(公告)日：2022-03-24

申请号：US17027772

申请日：2020-09-22

Applicant: Infineon Technologies AG

Inventor： Tomas Manuel Reiter ,  Elvis Keli ,  Anthony Thomas

IPC: H01L23/40 ,  H01L23/498

Abstract: A power semiconductor module includes: a carrier; a plurality of semiconductor dies attached to a first side of the carrier and electrically connected to form a circuit or part of a circuit; a cooling device at a second side of the carrier opposite the first side; a clamping device attached to the cooling device and pressing the carrier toward the cooling device such that the second side of the carrier is in thermal contact with the cooling device without having an intervening base plate between the carrier and the cooling device; and a first sensor device embedded in the clamping device or attached to an interior surface of the clamping device.

公开(公告)号：US20210118613A1

公开(公告)日：2021-04-22

申请号：US16654622

申请日：2019-10-16

Applicant: Infineon Technologies AG ,  TDK Electronics AG

Inventor： Tomas Manuel Reiter ,  Karl Niklas

IPC: H01G2/00 ,  H05K5/02 ,  H01R12/55

Abstract: A capacitor includes an electrically insulating housing that encloses an interior volume, first and second conductive connection pads that are each configured as externally accessible points of electrical contact to internal electrodes of the capacitor that are disposed within the housing, and an active capacitor dielectric material disposed within the housing and being configured as a dielectric medium between the internal electrodes, the first conductive connection pad having a first planar contact surface that is substantially parallel to a first sidewall of the housing, the second conductive connection pad having a second planar contact surface that is substantially parallel to the first sidewall, the first and second planar contact surfaces being offset from one another in a direction that is orthogonal to the first sidewall.