公开(公告)号：US20190045188A1

公开(公告)日：2019-02-07

申请号：US15886520

申请日：2018-02-01

Applicant: INTEL CORPORATION

Inventor： Nader Mahdi ,  Chekib Nouira ,  Hassen Guermazi ,  Amir Naghdinezhad ,  Faouzi Kossentini ,  Foued Ben Amara

IPC: H04N19/126 ,  H04N19/18 ,  H04N19/176 ,  H04N19/122

Abstract: Techniques related to transform coefficient shaping for video encoding are discussed. Such techniques include applying weighting parameters from one or more perceptually-designed matrices of weighting parameters to blocks of transform coefficients to generate weighted transform coefficients and encoding the weighted transform coefficients into a bitstream. The process may be based on sets of perceptually designed matrices of weighting parameters. Classifier outputs may be used to select from the set of perceptually designed matrices a subset of matrices to work with. The latter may be used in a synthesis procedure to develop the final weighting matrix to be used is shaping the transform coefficients.

公开(公告)号：US20250055987A1

公开(公告)日：2025-02-13

申请号：US18812760

申请日：2024-08-22

Applicant: Intel Corporation

Inventor： Brinda Ganesh ,  Nilesh Jain ,  Sumit Mohan ,  Faouzi Kossentini ,  Jill Boyce ,  James Holland ,  Zhijun Lei ,  Chekib Nouira ,  Foued Ben Amara ,  Hassene Tmar ,  Sebastian Possos ,  Craig Hurst

IPC: H04N19/114 ,  H04N19/154

Abstract: Techniques related to distributing the video encoding processing of an input video across hardware and software systems. Such techniques include evaluating the content of the video and determine whether or the encoding operation is best to be done on the hardware system only, software system only or a hybrid hardware and software system.

公开(公告)号：US11095895B2

公开(公告)日：2021-08-17

申请号：US15886520

申请日：2018-02-01

Applicant: INTEL CORPORATION

Inventor： Nader Mahdi ,  Chekib Nouira ,  Hassen Guermazi ,  Amir Naghdinezhad ,  Faouzi Kossentini ,  Foued Ben Amara

IPC: H04N19/124 ,  H04N19/136 ,  H04N19/126 ,  H04N19/18 ,  H04N19/122 ,  H04N19/176 ,  H04N19/14 ,  H04N19/625 ,  H04N19/91 ,  H04N19/96

Abstract: Techniques related to transform coefficient shaping for video encoding are discussed. Such techniques include applying weighting parameters from one or more perceptually-designed matrices of weighting parameters to blocks of transform coefficients to generate weighted transform coefficients and encoding the weighted transform coefficients into a bitstream. The process may be based on sets of perceptually designed matrices of weighting parameters. Classifier outputs may be used to select from the set of perceptually designed matrices a subset of matrices to work with. The latter may be used in a synthesis procedure to develop the final weighting matrix to be used is shaping the transform coefficients.

公开(公告)号：US20210105466A1

公开(公告)日：2021-04-08

申请号：US17127544

申请日：2020-12-18

Applicant: Intel Corporation

Inventor： Brinda Ganesh ,  Nilesh Jain ,  Sumit Mohan ,  Faouzi Kossentini ,  Jill Boyce ,  James Holland ,  Zhijun Lei ,  Chekib Nouira ,  Foued Ben Amara ,  Hassene Tmar ,  Sebastian Possos ,  Craig Hurst

IPC: H04N19/114 ,  H04N19/154

Abstract: Techniques related to distributing the video encoding processing of an input video across hardware and software systems. Such techniques include evaluating the content of the video and determine whether or the encoding operation is best to be done on the hardware system only, software system only or a hybrid hardware and software system.

公开(公告)号：US12101475B2

公开(公告)日：2024-09-24

申请号：US17127544

申请日：2020-12-18

Applicant: Intel Corporation

Inventor： Brinda Ganesh ,  Nilesh Jain ,  Sumit Mohan ,  Faouzi Kossentini ,  Jill Boyce ,  James Holland ,  Zhijun Lei ,  Chekib Nouira ,  Foued Ben Amara ,  Hassene Tmar ,  Sebastian Possos ,  Craig Hurst

IPC: H04N19/114 ,  H04N19/154

CPC classification number: H04N19/114 ,  H04N19/154

Abstract: Techniques related to distributing the video encoding processing of an input video across hardware and software systems. Such techniques include evaluating the content of the video and determine whether or the encoding operation is best to be done on the hardware system only, software system only or a hybrid hardware and software system.

公开(公告)号：US12099838B2

公开(公告)日：2024-09-24

申请号：US17132464

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Deepti Aggarwal ,  Michael Espig ,  Chekib Nouira ,  Robert Valentine ,  Mark Charney

IPC: G06F17/18 ,  G06F9/30 ,  G06F9/38 ,  G06F17/16

CPC classification number: G06F9/3001 ,  G06F9/3802 ,  G06F9/3818 ,  G06F17/16 ,  G06F17/18

Abstract: In an embodiment, a processor includes: a fetch circuit to fetch instructions, the instructions including a sum of squared differences (SSD) instruction; a decode circuit to decode the SSD instruction; and an execution circuit to, during an execution of the decoded SSD instruction, generate an SSD output vector based on a plurality of input vectors, the SSD output vector including a plurality of squared differences values. Other embodiments are described and claimed.

公开(公告)号：US10904552B2

公开(公告)日：2021-01-26

申请号：US15898022

申请日：2018-02-15

Applicant: Intel Corporation

Inventor： Hassen Guermazi ,  Nader Mahdi ,  Chekib Nouira ,  Omar Khlif ,  Faouzi Kossentini ,  Foued Ben Amara

IPC: H04N19/51 ,  H04N19/46 ,  H04N19/159 ,  H04N19/176 ,  H04N19/103 ,  H04N19/146

Abstract: Techniques related to video encoding are discussed that, for each block of input video, select an individual partitioning and coding mode selection technique from multiple such selection techniques. For a picture, the selection algorithm takes as input scores for individual blocks, costs of the various partitioning and coding mode selection techniques, and various detector outputs. The selection algorithm provides as output a partitioning and coding mode selection technique for each block in picture. The algorithms selection is such that the overall cost of the selected algorithms in the picture is as close as possible to a given picture budget. Furthermore, a partitioning and coding mode selection algorithms, binary depth partitioning (BDP), is discussed. For a block, BDP provides fast convergence to a partitioning and associated coding modes first evaluating intermediate partitioning options and converging on the final partitioning by evaluating either larger of smaller partitions.

公开(公告)号：US10687054B2

公开(公告)日：2020-06-16

申请号：US15849422

申请日：2017-12-20

Applicant: Intel Corporation

Inventor： Nader Mahdi ,  Chekib Nouira ,  Hassen Guermazi ,  Faouzi Kossentini

IPC: H04N19/00 ,  H04N19/105 ,  H04N19/14 ,  H04N19/503 ,  H04N19/86 ,  H04N19/176 ,  H04N19/107 ,  H04N19/436 ,  H04N19/119 ,  H04N19/147

Abstract: Techniques related to video encoding that provide for a decoupled prediction and coding structure for improved performance are discussed. Such techniques include determining final partitioning decisions for blocks of a picture by evaluating intra modes for candidate partitions by comparing the candidate partitions to intra predicted partitions generated using only original pixel samples and evaluating inter modes for the candidate partitions by comparing the candidate partitions to search partitions including original pixel samples and encoding using the final partitioning decision.