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公开(公告)号:US20250158687A1
公开(公告)日:2025-05-15
申请号:US19022323
申请日:2025-01-15
Applicant: Intel Corporation
Inventor: Guotong Wang , Gang Xiong , Alexei Davydov , Seunghee Han , Daewon Lee
IPC: H04B7/06 , H04L5/00 , H04W56/00 , H04W74/0833 , H04W76/19
Abstract: Methods, systems, and storage media are described for beam management for higher-frequency systems, such as, for example, those above 52.6 GHz. Other embodiments may be described and/or claimed.
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2.
公开(公告)号:US12238742B2
公开(公告)日:2025-02-25
申请号:US18477380
申请日:2023-09-28
Applicant: Intel Corporation
Inventor: Yingyang Li , Gang Xiong , Daewon Lee
IPC: H04W72/23 , H04L5/00 , H04W72/0453
Abstract: Various embodiments herein provide techniques for control resource set (CORESET) configuration and PDCCH design for system operating above 52.6 GHz carrier frequency. Embodiments provide detailed design for the CORESET structure to support multiple precoders for a PDCCH. The DFT size of control could be different from DFT size of data. Additionally, embodiments provide techniques for channel multiplexing of control and data transmission for system operating above 52.6 GHz carrier frequency. Other embodiments may be described and claimed.
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公开(公告)号:US12057977B2
公开(公告)日:2024-08-06
申请号:US17108821
申请日:2020-12-01
Applicant: Intel Corporation
Inventor: Gregory Morozov , Gang Xiong , Alexei Davydov , Daewon Lee
CPC classification number: H04L27/2014 , H04L27/22 , H04L27/261 , H04L27/265
Abstract: Various embodiments herein provide techniques for synchronization signal block (SSB) configuration for wireless cellular networks. The SSB may be for carrier frequencies above 52.6 gigahertz (GHz). Other embodiments may be described and claimed.
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公开(公告)号:US20240260010A1
公开(公告)日:2024-08-01
申请号:US18290339
申请日:2022-03-21
Applicant: Intel Corporation
Inventor: Alexei Davydov , Daewon Lee , Yingyang Li , Yi Wang , Gang Xiong
IPC: H04W72/0446 , H04L5/00 , H04W72/231 , H04W72/232
CPC classification number: H04W72/0446 , H04L5/0094 , H04W72/231 , H04W72/232
Abstract: A user equipment (UE) configured for multi-slot physical downlink control channel (PDCCH) monitoring may decode higher-layer signalling comprising configuration information received from a gNodeB (gNB) that configure the UE with search space (SS) sets for multi-slot PDCCH monitoring. At least some slots of the SS sets may be indicated to have a PDCCH monitoring occasion (MO). A SS set may be configured in a number (Y) of consecutive non-overlapping slots (MO slots) within slot groups of a number (X) of consecutive non-overlapping slots. The number (X) of consecutive slots of the slot group may be at least twice the number (Y) of consecutive MO slots within each SS set. The number (X) of consecutive slots of the slot group and the number (Y) of consecutive MO slots within each SS set that comprise the PDCCH MO may also be based on a subcarrier spacing (SCS).
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公开(公告)号:US11997039B2
公开(公告)日:2024-05-28
申请号:US18347247
申请日:2023-07-05
Applicant: Intel Corporation
Inventor: Gang Xiong , Seunghee Han , Alexei Davydov , Daewon Lee
CPC classification number: H04L5/0048 , H04J3/16 , H04W72/21
Abstract: Various embodiments herein provide physical uplink control channel (PUCCH) designs for discrete Fourier transform-spread-orthogonal frequency-division multiplexing (DFT-s-OFDM) waveforms for systems operating above the 52.6 GHz carrier frequency. Some embodiments of the present disclosure may be directed to phase tracking reference signal (PT-RS) design for PUCCH with carrier frequencies above 52.6 GHz. Other embodiments may be disclosed and/or claimed.
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6.
公开(公告)号:US20240172224A1
公开(公告)日:2024-05-23
申请号:US18549140
申请日:2022-03-01
Applicant: Intel Corporation
Inventor: Gang Xiong , Alexei Davydov , Yingyang Li , Daewon Lee , Seunghee Han
IPC: H04W72/1268 , H04L1/08 , H04L5/00 , H04W72/21 , H04W72/232
CPC classification number: H04W72/1268 , H04L1/08 , H04L5/0051 , H04W72/21 , H04W72/232
Abstract: Various embodiments herein provide techniques related to transmission and retransmission of data in systems that are operating with carrier frequencies above approximately 52.6 gigahertz (GHz). Some embodiments herein may refer to an enhanced transmission scheme for UCI. Some embodiments may additionally or alternatively relate to mixed initial transmission and retransmission of data channels for higher carrier frequencies. Other embodiments may be described and/or claimed.
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公开(公告)号:US11991728B2
公开(公告)日:2024-05-21
申请号:US17005132
申请日:2020-08-27
Applicant: Intel Corporation
Inventor: Gang Xiong , Daewon Lee , Yingyang Li , Alexei Davydov , Bishwarup Mondal , Gregory Morozov , Lopamudra Kundu , Yongjun Kwak
IPC: H04W72/0453 , H04L5/00 , H04L5/10 , H04L27/26 , H04W56/00 , H04W72/0446 , H04W72/23 , H04W72/53
CPC classification number: H04W72/53 , H04L5/0051 , H04L5/10 , H04L27/2607 , H04W56/001 , H04W72/0446 , H04W72/0453 , H04W72/23
Abstract: Various embodiments provide techniques for high frequency wireless communication. For example, embodiments include techniques for a transmission scheme for physical downlink control channel (PDCCH) with single carrier waveform; synchronization signal block (SSB) rate matching indication for NR unlicensed operation; beam acquisition for frequency division duplex (FDD) systems; and/or SSB patterns and multiplexing for downlink transmissions. Other embodiments may be described and claimed.
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8.
公开(公告)号:US20240023125A1
公开(公告)日:2024-01-18
申请号:US18477380
申请日:2023-09-28
Applicant: Intel Corporation
Inventor: Yingyang Li , Gang Xiong , Daewon Lee
IPC: H04W72/23 , H04L5/00 , H04W72/0453
CPC classification number: H04W72/23 , H04L5/0094 , H04W72/0453 , H04L5/0048
Abstract: Various embodiments herein provide techniques for control resource set (CORESET) configuration and PDCCH design for system operating above 52.6 GHz carrier frequency. Embodiments provide detailed design for the CORESET structure to support multiple precoders for a PDCCH. The DFT size of control could be different from DFT size of data. Additionally, embodiments provide techniques for channel multiplexing of control and data transmission for system operating above 52.6 GHz carrier frequency. Other embodiments may be described and claimed.
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公开(公告)号:US11871419B2
公开(公告)日:2024-01-09
申请号:US16951926
申请日:2020-11-18
Applicant: Intel Corporation
Inventor: Gang Xiong , Yingyang Li , Gregory Morozov , Daewon Lee
IPC: H04W72/23 , H04L5/00 , H04L1/1812 , H04W72/0446
CPC classification number: H04W72/23 , H04L1/1812 , H04L5/0048 , H04W72/0446
Abstract: Various embodiments herein are directed to multi-Transmission Time Interval (TTI) scheduling for data transmission for system operating above the 52.6 GHz carrier frequency. Other embodiments may be disclosed and/or claimed.
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公开(公告)号:US20230164841A1
公开(公告)日:2023-05-25
申请号:US17917594
申请日:2021-07-09
Applicant: Intel Corporation
Inventor: Salvatore Talarico , Yingyang Li , Gang Xiong , Daewon Lee
CPC classification number: H04W74/0816 , H04W74/04 , H04W74/0866
Abstract: An apparatus used in a UE includes processing circuitry and memory. To configure the UE for operating in an unlicensed spectrum in a 5G NR system at a carrier frequency of above 52.6 GHz, the processing circuitry is configured to perform a CCA procedure to assess occupancy of a communication channel in the unlicensed spectrum. A reservation signal is encoded for transmission on the communication channel when the CCA procedure is successful. The reservation signal occupies a time interval between completion of the CCA procedure and a starting symbol of an uplink transmission opportunity. Data PUSCH is encoded for transmission to a base station during the transmission opportunity and following the transmission of the reservation signal.
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