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公开(公告)号:US11830863B2
公开(公告)日:2023-11-28
申请号:US17539088
申请日:2021-11-30
Applicant: Intel Corporation
Inventor: Suresh V. Pothukuchi , Andrew Alduino , Ravindranath V. Mahajan , Srikant Nekkanty , Ling Liao , Harinadh Potluri , David M. Bond , Sushrutha Reddy Gujjula , Donald Tiendung Tran , David Hui , Vladimir Tamarkin
IPC: H01L25/16 , H01L23/367 , H01L23/40 , H01L23/473 , H01L23/538 , H04Q11/00
CPC classification number: H01L25/167 , H01L23/367 , H01L23/40 , H01L23/4006 , H01L23/473 , H01L23/5385 , H01L23/5386 , H04Q11/0005 , H01L2023/4031 , H04Q2011/0039
Abstract: Embodiments disclosed herein include electronic packages for optical to electrical switching. In an embodiment, an electronic package comprises a first package substrate and a second package substrate attached to the first package substrate. In an embodiment, a die is attached to the second package substrate. In an embodiment, a plurality of photonics engines are attached to a first surface and a second surface of the first package substrate. In an embodiment, the plurality of photonics engines are communicatively coupled to the die through the first package substrate and the second package substrate.
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公开(公告)号:US20230074269A1
公开(公告)日:2023-03-09
申请号:US17469449
申请日:2021-09-08
Applicant: Intel Corporation
Inventor: Donald Tiendung Tran , Srikant Nekkanty
Abstract: Technologies for applying gold-plated contact pads to circuit boards are disclosed. In one embodiment, an array of gold-plated contact pads is prepared on a flexible substrate. The array of gold-plated contact pads can then be transferred to a circuit board, such as by soldering the gold-plated contact pads to the circuit board. In another embodiment, an array of contact pads are prepared on a top and bottom surface of a substrate, and vias are added to connect the contact pads on the top and bottom surfaces. The top array of contact pads are gold-plated. The bottom array of contact pads are mated to a circuit board. Techniques described herein allow for gold-plated contact pads to be applied to a circuit board without requiring the entire circuit board to undergo a gold plating process, which may reduce manufacturing costs.
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公开(公告)号:US11569596B2
公开(公告)日:2023-01-31
申请号:US16833221
申请日:2020-03-27
Applicant: Intel Corporation
Inventor: Steven A. Klein , Kuang Liu , Srikant Nekkanty , Feroz Mohammad , Donald Tiendung Tran , Srinivasa Aravamudhan , Hemant Mahesh Shah , Alexander W. Huettis
Abstract: Systems, apparatus, and/or processes directed to applying pressure to a socket to alter a shape of the socket to improve a connection between the socket and a substrate, printed circuit board, or other component. The socket may receive one or more chips, may be an interconnect, or may be some other structure that is part of a package. The shape of the socket may be flattened so that a side of the socket may form a high-quality physical and electrical coupling with the substrate.
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公开(公告)号:US11217573B2
公开(公告)日:2022-01-04
申请号:US16809515
申请日:2020-03-04
Applicant: Intel Corporation
Inventor: Suresh V. Pothukuchi , Andrew Alduino , Ravindranath V. Mahajan , Srikant Nekkanty , Ling Liao , Harinadh Potluri , David M. Bond , Sushrutha Reddy Gujjula , Donald Tiendung Tran , David Hui , Vladimir Tamarkin
IPC: H01L25/16 , H01L23/367 , H01L23/40 , H01L23/473 , H01L23/538 , H04Q11/00
Abstract: Embodiments disclosed herein include electronic packages for optical to electrical switching. In an embodiment, an electronic package comprises a first package substrate and a second package substrate attached to the first package substrate. In an embodiment, a die is attached to the second package substrate. In an embodiment, a plurality of photonics engines are attached to a first surface and a second surface of the first package substrate. In an embodiment, the plurality of photonics engines are communicatively coupled to the die through the first package substrate and the second package substrate.
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