公开(公告)号：US11550917B2

公开(公告)日：2023-01-10

申请号：US16457184

申请日：2019-06-28

Applicant: Intel Corporation

Inventor： Aditya Katragada ,  Prashant Dewan ,  Karunakara Kotary ,  Vinupama Godavarthi ,  Kumar Dwarakanath ,  Alex Izbinsky ,  Purushottam Goel

IPC: G06F21/57 ,  G06F21/72 ,  G06F9/445

Abstract: There is disclosed in one example, a system-on-a-chip (SoC), including: a processor core; a fabric; an intellectual property (IP) block communicatively coupled to the processor core via the fabric, the IP block having a microcontroller configured to provide a microcontroller architecture; a firmware load interface configured to provide a standardized hardware interface to the microcontroller architecture, wherein the standardized hardware interface provides an architecture-agnostic mechanism to securely load a firmware to the intellectual property block; and logic to provide a loader to load a firmware to the IP block via the firmware load interface.

公开(公告)号：US20210319138A1

公开(公告)日：2021-10-14

申请号：US17358287

申请日：2021-06-25

Applicant: Intel Corporation

Inventor： Prashant Dewan ,  Baiju Patel ,  Siddhartha Chhabra ,  Ofir Shwartz ,  Kumar Dwarakanath

IPC: G06F21/72 ,  G06F21/79 ,  G06F21/73 ,  G06F21/60 ,  G06F15/78 ,  G06F7/58

Abstract: Methods and apparatus relating to utilization of logic and a serial number to provide persistent unique platform secret for generation of System on Chip (SOC or SoC) root keys are described. In an embodiment, stepping logic circuitry generates a stepping identifier in response to a first signal. Unique identifier logic circuitry generates a unique identifier in response to a second signal. Secret generation logic circuitry generates a key based at least in part on the stepping identifier and the unique identifier. The unique identifier is stored in persistent memory. Other embodiments are also disclosed and claimed.

公开(公告)号：US20240031158A1

公开(公告)日：2024-01-25

申请号：US18202885

申请日：2023-05-26

Applicant: Intel Corporation

Inventor： Michael Neve De Mevergnies ,  Neel Shah ,  Kumar Dwarakanath ,  Fred Bolay ,  Mukesh Kataria

IPC: H04L9/32 ,  G06F21/33 ,  G06F21/62 ,  G06F21/85 ,  G06F21/72 ,  H04L9/06

CPC classification number: H04L9/3228 ,  G06F21/335 ,  G06F21/6218 ,  G06F21/85 ,  G06F21/72 ,  H04L9/3213 ,  H04L9/3247 ,  H04L9/3226 ,  H04L9/3297 ,  H04L9/0643 ,  G06F21/53

Abstract: Technologies disclosed herein provide an apparatus comprising a fuse controller coupled to an aggregator. The fuse controller includes a plurality of fuses for storing a unique identifier of a device and a first secured value of a first password associated with the unique identifier. The aggregator is to receive the unique identifier and the first secured value from the fuse controller, send the unique identifier to an unlock host, receive a second password from the unlock host, compute a second secured value of the second password using a security function, and unlock one or more privileged features on the device based on the first secured value corresponding to the second secured value. In a specific embodiment, the first secured value corresponds to the second secured value if the first password is equivalent to the second password.

公开(公告)号：US20230169173A1

公开(公告)日：2023-06-01

申请号：US18088730

申请日：2022-12-26

Applicant: Intel Corporation

Inventor： Aditya Katragada ,  Prashant Dewan ,  Karunakara Kotary ,  Vinupama Godavarthi ,  Kumar Dwarakanath ,  Alex Izbinsky ,  Purushottam Goel

IPC: G06F21/57 ,  G06F21/72 ,  G06F9/445

CPC classification number: G06F21/572 ,  G06F21/72 ,  G06F9/445 ,  G06F2221/033

Abstract: An integrated circuit provides a firmware dashboard to communicatively couple to a basic input/output system (BIOS), and provide to the BIOS a firmware load interface, and an intellectual property (IP) block interface to communicatively couple to an IP block, wherein the IP block provides a push model to load a firmware or a pull model to load the firmware, and wherein the firmware dashboard provides a common load flow to the BIOS for both the push model and pull model.

公开(公告)号：US11664994B2

公开(公告)日：2023-05-30

申请号：US16983904

申请日：2020-08-03

Applicant: Intel Corporation

Inventor： Michael Neve De Mevergnies ,  Neel Shah ,  Kumar Dwarakanath ,  Fred Bolay ,  Mukesh Kataria

IPC: H04L9/32 ,  G06F21/33 ,  G06F21/62 ,  G06F21/85 ,  G06F21/72 ,  H04L9/06 ,  G06F21/53

CPC classification number: H04L9/3228 ,  G06F21/335 ,  G06F21/6218 ,  G06F21/72 ,  G06F21/85 ,  H04L9/0643 ,  H04L9/3213 ,  H04L9/3226 ,  H04L9/3247 ,  H04L9/3297 ,  G06F21/53 ,  G06F2221/2149

Abstract: Technologies disclosed herein provide an apparatus comprising a fuse controller coupled to an aggregator. The fuse controller includes a plurality of fuses for storing a unique identifier of a device and a first secured value of a first password associated with the unique identifier. The aggregator is to receive the unique identifier and the first secured value from the fuse controller, send the unique identifier to an unlock host, receive a second password from the unlock host, compute a second secured value of the second password using a security function, and unlock one or more privileged features on the device based on the first secured value corresponding to the second secured value. In a specific embodiment, the first secured value corresponds to the second secured value if the first password is equivalent to the second password.

公开(公告)号：US20190007212A1

公开(公告)日：2019-01-03

申请号：US15640439

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： Michael Neve de Mevergnies ,  Neel Shah ,  Kumar Dwarakanath ,  Fred Bolay ,  Mukesh Kataria

IPC: H04L9/32 ,  G06F21/33

Abstract: Technologies disclosed herein provide an apparatus comprising a fuse controller coupled to an aggregator. The fuse controller includes a plurality of fuses for storing a unique identifier of a device and a first secured value of a first password associated with the unique identifier. The aggregator is to receive the unique identifier and the first secured value from the fuse controller, send the unique identifier to an unlock host, receive a second password from the unlock host, compute a second secured value of the second password using a security function, and unlock one or more privileged features on the device based on the first secured value corresponding to the second secured value. In a specific embodiment, the first secured value corresponds to the second secured value if the first password is equivalent to the second password.