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公开(公告)号：US09559445B2
公开(公告)日：2017-01-31
申请号：US14575318
申请日：2014-12-18
Applicant: Intel Corporation
Inventor： Timothy Wig
CPC classification number: H01R12/7005 , H01R12/737 , H05K1/117 , H05K2201/09781
Abstract: Techniques for manufacturing an add-in card are described. An example of an add-in card in accordance with the described techniques includes a circuit board with contact fingers formed on an outer surface of the circuit board. Each of the contact fingers is configured to make electrical contact with a pin when inserted into a receptacle. The gap between the contact fingers is greater than or equal to a width of the pin. The add-in card also includes a protection mechanism to prevent the pin from being captured between the contact fingers if the add-in card is misaligned when inserted or removed.
Abstract translation: 描述了用于制造附加卡的技术。 根据所述技术的附加卡的示例包括形成在电路板的外表面上的具有接触指针的电路板。 每个接触指状物被构造成当插入插座时与销电接触。 接触指之间的间隙大于或等于销的宽度。 附加卡还包括保护机构，以防止插入卡在插入或移除时未对准时，引脚在触针之间被捕获。
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公开(公告)号：US20190296470A1
公开(公告)日：2019-09-26
申请号：US16436743
申请日：2019-06-10
Applicant: Intel Corporation
Inventor： Timothy Wig , Manisha M. Nilange , Thane M. Larson , Horthense Delphine Tamdem
Abstract: A device includes a circuit board with circuit components, and first edge finger tab extending from the circuit board, and a second edge finger tab extending from the circuit board. The first edge finger tab includes electrical contacts to provide signaling to and from particular circuit components of the circuit board, and is to mate with a Peripheral Component Interconnect Express (PCIe)-compatible edge card connection mechanism of a baseboard. The second edge finger tab includes electrical contacts to provide power delivery to the circuit board, is to mate with a second edge card connection mechanism of the baseboard. In some aspects, the second edge finger tab may be a PCIe-compatible feature that is typically to prevent the device from being inserted into a legacy PCI edge card connection mechanism, or with a PCIe-compatible feature that is typically to engage a retention mechanism of a baseboard.
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3.发明申请公开(公告)号：US20180276176A1
公开(公告)日：2018-09-27
申请号：US15641186
申请日：2017-07-03
Applicant: Intel Corporation
Inventor： Timothy Wig , Umair I. Khan
CPC classification number: G06F13/4282 , G06F13/4068 , G06F2213/0026 , H01R13/6471 , H01R13/6474 , H05K1/0222 , H05K1/115 , H05K3/366 , H05K2201/09227 , H05K2201/09709 , H05K2201/10303
Abstract: Embodiments are directed to systems and device that include a printed circuit board (PCB) and a through-hole pin-field. The pin-field includes a plurality of ground through-holes arranged along a centerline; a plurality of ground pins, each of the plurality of ground pins coupled to a corresponding ground through-hole; a first signal though-hole arranged on a first side of the centerline; a second signal through-hole arrange on a second side of the centerline, the first side oppose the second side; a first signal pin electrically connected to the PCB through the first signal through-hole, the first signal pin comprising a bend in a first direction and disposed proximate the first through-hole; and a second signal pin electrically connected to the PCB through the second signal through-hole, the second signal pin comprising a bend in a second direction opposite the first direction and disposed proximate the second through-hole.
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公开(公告)号：US11599497B2
公开(公告)日：2023-03-07
申请号：US17008363
申请日：2020-08-31
Applicant: Intel Corporation
Inventor： Zuoguo Wu , Debendra Das Sharma , Mohiuddin M. Mazumder , Jong-Ru Guo , Anupriya Sriramulu , Narasimha Lanka , Timothy Wig , Jeff Morriss
IPC: G06F15/173 , H01L23/522 , H03K19/17736 , G06F15/16 , H01L21/768 , G06F9/28
Abstract: A device includes a receiver to receive one or more training sequences during a training of a link, where the link connects two devices. The device may include agent logic to determine, from the one or more training sequences, a number of extension devices on the link between the two devices, and determine that the number of extension devices exceeds a threshold number. The device may include a transmitter to send a plurality of clock compensation ordered sets on the link based on determining that the number of extension devices exceeds a threshold number.
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5.发明授权公开(公告)号：US11569617B2
公开(公告)日：2023-01-31
申请号：US16949194
申请日：2020-10-19
Applicant: Intel Corporation
Inventor： Timothy Wig
IPC: H05K1/18 , H01R13/6471 , H01R12/71
Abstract: A system board is provided that includes a connector. The connector includes a pinfield. The pinfield includes a set of differential signal conductors to correspond to pins of a set of differential signaling pairs; a set of one or more auxiliary signal conductors to carry auxiliary signals; and a plurality of thru-hole ground vias adjacent to a particular one of the auxiliary signal conductors in the set of auxiliary signal conductors.
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Patent Agency Ranking
公开(公告)号：US10804631B2
公开(公告)日：2020-10-13
申请号：US16436743
申请日：2019-06-10
Applicant: Intel Corporation
Inventor： Timothy Wig , Manisha M. Nilange , Thane M. Larson , Horthense Delphine Tamdem
Abstract: A device includes a circuit board with circuit components, and first edge finger tab extending from the circuit board, and a second edge finger tab extending from the circuit board. The first edge finger tab includes electrical contacts to provide signaling to and from particular circuit components of the circuit board, and is to mate with a Peripheral Component Interconnect Express (PCIe)-compatible edge card connection mechanism of a baseboard. The second edge finger tab includes electrical contacts to provide power delivery to the circuit board, is to mate with a second edge card connection mechanism of the baseboard. In some aspects, the second edge finger tab may be a PCIe-compatible feature that is typically to prevent the device from being inserted into a legacy PCI edge card connection mechanism, or with a PCIe-compatible feature that is typically to engage a retention mechanism of a baseboard.
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公开(公告)号：US10789201B2
公开(公告)日：2020-09-29
申请号：US15636738
申请日：2017-06-29
Applicant: Intel Corporation
Inventor： Zuoguo Wu , Debendra Das Sharma , Mohiuddin M. Mazumder , Jong-Ru Guo , Anupriya Sriramulu , Narasimha Lanka , Timothy Wig , Jeff Morriss
IPC: G06F15/173 , H01L23/522 , H03K19/17736 , G06F15/16 , H01L21/768 , G06F9/28
Abstract: A device includes a receiver to receive one or more training sequences during a training of a link, where the link connects two devices. The device may include agent logic to determine, from the one or more training sequences, a number of extension devices on the link between the two devices, and determine that the number of extension devices exceeds a threshold number. The device may include a transmitter to send a plurality of clock compensation ordered sets on the link based on determining that the number of extension devices exceeds a threshold number.
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公开(公告)号：US20160181712A1
公开(公告)日：2016-06-23
申请号：US14575318
申请日：2014-12-18
Applicant: Intel Corporation
Inventor： Timothy Wig
CPC classification number: H01R12/7005 , H01R12/737 , H05K1/117 , H05K2201/09781
Abstract: Techniques for manufacturing an add-in card are described. An example of an add-in card in accordance with the described techniques includes a circuit board with contact fingers formed on an outer surface of the circuit board. Each of the contact fingers is configured to make electrical contact with a pin when inserted into a receptacle. The gap between the contact fingers is greater than or equal to a width of the pin. The add-in card also includes a protection mechanism to prevent the pin from being captured between the contact fingers if the add-in card is misaligned when inserted or removed.
Abstract translation: 描述了用于制造附加卡的技术。 根据所述技术的附加卡的示例包括形成在电路板的外表面上的具有接触指针的电路板。 每个接触指状物被构造成当插入插座时与销电接触。 接触指之间的间隙大于或等于销的宽度。 附加卡还包括保护机构，以防止插入卡在插入或移除时未对准时，引脚在触针之间被捕获。
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9.发明申请公开(公告)号：US20210036464A1
公开(公告)日：2021-02-04
申请号：US16949194
申请日：2020-10-19
Applicant: Intel Corporation
Inventor： Timothy Wig
IPC: H01R13/6471
Abstract: A system board is provided that includes a connector. The connector includes a pinfield. The pinfield includes a set of differential signal conductors to correspond to pins of a set of differential signaling pairs; a set of one or more auxiliary signal conductors to carry auxiliary signals; and a plurality of thru-hole ground vias adjacent to a particular one of the auxiliary signal conductors in the set of auxiliary signal conductors.
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公开(公告)号：US20180253398A1
公开(公告)日：2018-09-06
申请号：US15636738
申请日：2017-06-29
Applicant: Intel Corporation
Inventor： Zuoguo Wu , Debendra Das Sharma , Mohiuddin M. Mazumder , Jong-Ru Guo , Anupriya Sriramulu , Narasimha Lanka , Timothy Wig , Jeff Morriss
IPC: G06F15/173 , H01L23/522 , H03K19/177 , G06F15/16 , H01L21/768 , G06F9/28
Abstract: A device includes a receiver to receive one or more training sequences during a training of a link, where the link connects two devices. The device may include agent logic to determine, from the one or more training sequences, a number of extension devices on the link between the two devices, and determine that the number of extension devices exceeds a threshold number. The device may include a transmitter to send a plurality of clock compensation ordered sets on the link based on determining that the number of extension devices exceeds a threshold number.
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