公开(公告)号：US10409612B2

公开(公告)日：2019-09-10

申请号：US14998249

申请日：2015-12-26

Applicant: Intel Corporation

Inventor： Martin G. Dixon ,  Ravi Rajwar ,  Konrad K. Lai ,  Robert S. Chappell ,  Rajesh S. Parthasarathy ,  Alexandre J. Farcy ,  Ilhyun Kim ,  Prakash Math ,  Matthew Merten ,  Vijaykumar Kadgi

IPC: G06F9/30 ,  G06F9/38 ,  G06F12/0875 ,  G06F12/0897 ,  G06F13/16 ,  G06F13/40 ,  G06F12/084 ,  G06F12/0895 ,  G06F13/42 ,  G06F12/0831 ,  G06F9/52 ,  G06F12/0811 ,  G06F12/0862 ,  G06F12/1027 ,  G06F9/46 ,  G06F12/0815 ,  G06F12/1045 ,  G06F12/0806

Abstract: An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software. And to enable testing of such a fallback path, in one implementation, hardware provides software a mechanism to always abort speculative code regions.

公开(公告)号：US10409611B2

公开(公告)日：2019-09-10

申请号：US14998248

申请日：2015-12-26

Applicant: Intel Corporation

Inventor： Martin G. Dixon ,  Ravi Rajwar ,  Konrad K. Lai ,  Robert S. Chappell ,  Rajesh S. Parthasarathy ,  Alexandre J. Farcy ,  Ilhyun Kim ,  Prakash Math ,  Matthew Merten ,  Vijaykumar Kadgi

IPC: G06F9/30 ,  G06F9/38 ,  G06F12/0875 ,  G06F12/0897 ,  G06F13/16 ,  G06F13/40 ,  G06F12/084 ,  G06F12/0895 ,  G06F13/42 ,  G06F12/0831 ,  G06F9/52 ,  G06F12/0811 ,  G06F12/0862 ,  G06F12/1027 ,  G06F9/46 ,  G06F12/0815 ,  G06F12/1045 ,  G06F12/0806

Abstract: An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software. And to enable testing of such a fallback path, in one implementation, hardware provides software a mechanism to always abort speculative code regions.

公开(公告)号：US11592884B2

公开(公告)日：2023-02-28

申请号：US16648206

申请日：2018-01-25

Applicant: Intel Corporation

Inventor： Chee Lim Nge ,  Chia-Hung Kuo ,  Nivedita Aggarwal ,  Venkataramani Gopalakrishnan ,  Robert Gough ,  Basavaraj Astekar ,  Vijaykumar Kadgi

IPC: G06F1/26 ,  G06F1/3293 ,  G06F9/4401 ,  G06F13/42

Abstract: Apparatus and methods for managing power consumption of a data-path in a computer system are provided, the data-path comprising a first port and a second port, the first port comprising a high-speed and the second port comprising a low-speed port. The disclosed method including connecting a device to the data-path, determining that the connected device is to communicate using the second port and turning off an active circuit associated with the first port of the data-path.

公开(公告)号：US20190121771A1

公开(公告)日：2019-04-25

申请号：US16305852

申请日：2016-06-24

Applicant: INTEL CORPORATION

Inventor： Vijaykumar Kadgi

IPC: G06F13/40 ,  G06F1/16 ,  G06F13/42

Abstract: Embodiments are generally directed to dual role capable connectors for a separable portion of a computing apparatus. An embodiment of an apparatus includes a separable physical connection to a second apparatus; a first electronic connector, the first electronic connector providing data connections for the physical connection; a plurality of additional electronic connectors, the plurality of additional connectors being supported by the first electronic connector, and a control logic to control operation of the plurality of additional electronic connectors, wherein operation of the plurality of additional electronic connectors includes each additional electronic connector being capable to operate in both a host role and a device role for the interconnection of computing systems, wherein the host role and device role may be for a first connector mode or a second connector mode, and an alternative connector mode.