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公开(公告)号:US10559537B2
公开(公告)日:2020-02-11
申请号:US16127110
申请日:2018-09-10
Applicant: Invensas Corporation
Inventor: Abiola Awujoola , Zhuowen Sun , Wael Zohni , Ashok S. Prabhu , Willmar Subido
IPC: H01L23/552 , H01L23/00 , H01L23/498 , H01L25/10 , H01L25/03 , H01L25/065
Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
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公开(公告)号:US20180240773A1
公开(公告)日:2018-08-23
申请号:US15959619
申请日:2018-04-23
Applicant: Invensas Corporation
Inventor: Javier A. Delacruz , Abiola Awujoola , Ashok S. Prabhu , Christopher W. Lattin , Zhuowen Sun
IPC: H01L23/00 , H05K1/02 , H01L23/498 , H01L25/065 , H01L23/31 , H01L25/16
CPC classification number: H01L24/49 , H01L23/3121 , H01L23/49838 , H01L23/552 , H01L24/17 , H01L24/48 , H01L24/97 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/16 , H01L25/50 , H01L2224/04042 , H01L2224/11334 , H01L2224/16145 , H01L2224/16227 , H01L2224/17051 , H01L2224/32145 , H01L2224/32225 , H01L2224/48108 , H01L2224/48137 , H01L2224/48145 , H01L2224/48227 , H01L2224/49109 , H01L2224/73204 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/96 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06562 , H01L2225/1023 , H01L2924/00014 , H01L2924/14 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/19107 , H01L2924/3025 , H05K1/0284 , H01L2224/45099 , H01L2924/00012 , H01L2924/00
Abstract: In a vertically integrated microelectronic package, a first microelectronic device is coupled to an upper surface of a circuit platform in a wire bond-only surface area thereof. Wire bond wires are coupled to and extends away from an upper surface of the first microelectronic device. A second microelectronic device in a face-down orientation is coupled to upper ends of the wire bond wires in a surface mount-only area. The second microelectronic device is located above and at least partially overlaps the first microelectronic device. A protective layer is disposed over the circuit platform and the first microelectronic device. An upper surface of the protective layer has the surface mount-only area. The upper surface of the protective layer has the second microelectronic device disposed thereon in the face-down orientation in the surface mount-only area for coupling to the upper ends of the first wire bond wires.
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公开(公告)号:US20180061774A1
公开(公告)日:2018-03-01
申请号:US15804122
申请日:2017-11-06
Applicant: Invensas Corporation
Inventor: Abiola Awujoola , Zhuowen Sun , Wael Zohni , Ashok S. Prabhu , Willmar Subido
IPC: H01L23/552 , H01L23/00 , H01L25/065 , H01L25/10 , H01L23/498
CPC classification number: H01L23/552 , H01L23/49811 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/03 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L2224/04042 , H01L2224/1134 , H01L2224/12105 , H01L2224/13076 , H01L2224/13082 , H01L2224/131 , H01L2224/16145 , H01L2224/16227 , H01L2224/16265 , H01L2224/17051 , H01L2224/17181 , H01L2224/215 , H01L2224/2919 , H01L2224/32225 , H01L2224/45015 , H01L2224/48105 , H01L2224/48227 , H01L2224/48472 , H01L2224/4942 , H01L2224/73204 , H01L2224/73207 , H01L2224/73227 , H01L2224/73253 , H01L2224/73259 , H01L2224/73265 , H01L2224/73267 , H01L2224/85444 , H01L2224/85455 , H01L2225/06513 , H01L2225/06517 , H01L2225/1023 , H01L2225/1052 , H01L2924/00014 , H01L2924/01322 , H01L2924/1205 , H01L2924/1206 , H01L2924/1207 , H01L2924/181 , H01L2924/19105 , H01L2924/19107 , H01L2924/3025 , H01L2224/45099 , H01L2924/2075 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/00012 , H01L2924/014 , H01L2924/00 , H01L2224/05599
Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
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公开(公告)号:US20170117231A1
公开(公告)日:2017-04-27
申请号:US15344990
申请日:2016-11-07
Applicant: Invensas Corporation
Inventor: Abiola Awujoola , Zhuowen Sun , Wael Zohni , Ashok S. Prabhu , Willmar Subido
IPC: H01L23/552 , H01L23/498 , H01L25/065 , H01L23/00
CPC classification number: H01L23/552 , H01L23/49811 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/03 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L2224/04042 , H01L2224/1134 , H01L2224/12105 , H01L2224/13076 , H01L2224/13082 , H01L2224/131 , H01L2224/16145 , H01L2224/16227 , H01L2224/16265 , H01L2224/17051 , H01L2224/17181 , H01L2224/215 , H01L2224/2919 , H01L2224/32225 , H01L2224/45015 , H01L2224/48105 , H01L2224/48227 , H01L2224/48472 , H01L2224/4942 , H01L2224/73204 , H01L2224/73207 , H01L2224/73227 , H01L2224/73253 , H01L2224/73259 , H01L2224/73265 , H01L2224/73267 , H01L2224/85444 , H01L2224/85455 , H01L2225/06513 , H01L2225/06517 , H01L2225/1023 , H01L2225/1052 , H01L2924/00014 , H01L2924/01322 , H01L2924/1205 , H01L2924/1206 , H01L2924/1207 , H01L2924/181 , H01L2924/19105 , H01L2924/19107 , H01L2924/3025 , H01L2224/45099 , H01L2924/2075 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/00012 , H01L2924/014 , H01L2924/00 , H01L2224/05599
Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
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公开(公告)号:US09984992B2
公开(公告)日:2018-05-29
申请号:US14997774
申请日:2016-01-18
Applicant: Invensas Corporation
Inventor: Javier A. DeLaCruz , Abiola Awujoola , Ashok S. Prabhu , Christopher W. Lattin , Zhuowen Sun
IPC: H05K1/02 , H01L23/00 , H01L23/31 , H01L23/498 , H01L25/065 , H01L25/16
CPC classification number: H01L24/49 , H01L23/3121 , H01L23/49838 , H01L23/552 , H01L24/17 , H01L24/48 , H01L24/97 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/16 , H01L25/50 , H01L2224/04042 , H01L2224/11334 , H01L2224/16145 , H01L2224/16227 , H01L2224/17051 , H01L2224/32145 , H01L2224/32225 , H01L2224/48108 , H01L2224/48137 , H01L2224/48145 , H01L2224/48227 , H01L2224/49109 , H01L2224/73204 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06562 , H01L2225/1023 , H01L2924/00014 , H01L2924/14 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/19107 , H01L2924/3025 , H05K1/0284 , H01L2224/45099 , H01L2924/00012 , H01L2924/00
Abstract: In a vertically integrated microelectronic package, a first microelectronic device is coupled to an upper surface of a circuit platform in a wire bond-only surface area thereof. Wire bond wires are coupled to and extends away from an upper surface of the first microelectronic device. A second microelectronic device in a face-down orientation is coupled to upper ends of the wire bond wires in a surface mount-only area. The second microelectronic device is located above and at least partially overlaps the first microelectronic device. A protective layer is disposed over the circuit platform and the first microelectronic device. An upper surface of the protective layer has the surface mount-only area. The upper surface of the protective layer has the second microelectronic device disposed thereon in the face-down orientation in the surface mount-only area for coupling to the upper ends of the first wire bond wires.
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公开(公告)号:US09490222B1
公开(公告)日:2016-11-08
申请号:US14880967
申请日:2015-10-12
Applicant: Invensas Corporation
Inventor: Abiola Awujoola , Zhuowen Sun , Wael Zohni , Ashok S. Prabhu , Willmar Subido
IPC: H01L23/552 , H01L23/00
CPC classification number: H01L23/552 , H01L23/49811 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/03 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L2224/04042 , H01L2224/1134 , H01L2224/12105 , H01L2224/13076 , H01L2224/13082 , H01L2224/131 , H01L2224/16145 , H01L2224/16227 , H01L2224/16265 , H01L2224/17051 , H01L2224/17181 , H01L2224/215 , H01L2224/2919 , H01L2224/32225 , H01L2224/45015 , H01L2224/48105 , H01L2224/48227 , H01L2224/48472 , H01L2224/4942 , H01L2224/73204 , H01L2224/73207 , H01L2224/73227 , H01L2224/73253 , H01L2224/73259 , H01L2224/73265 , H01L2224/73267 , H01L2224/85444 , H01L2224/85455 , H01L2225/06513 , H01L2225/06517 , H01L2225/1023 , H01L2225/1052 , H01L2924/00014 , H01L2924/01322 , H01L2924/1205 , H01L2924/1206 , H01L2924/1207 , H01L2924/181 , H01L2924/19105 , H01L2924/19107 , H01L2924/3025 , H01L2224/45099 , H01L2924/2075 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/00012 , H01L2924/014 , H01L2924/00 , H01L2224/05599
Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
Abstract translation: 公开了一般涉及具有防止干扰的微电子封装的装置。 在其装置中,基板具有与上表面相对的上表面和下表面,并具有接地平面。 第一微电子器件耦合到衬底的上表面。 引线接合线耦合到接地平面,用于对其进行干涉并延伸离开衬底的上表面。 引线接合线的第一部分被定位成相对于干涉为第一微电子器件提供屏蔽区域。 导线接合线的第二部分不定位成提供屏蔽区域。 第二微电子器件耦合到衬底并且位于屏蔽区域外部。 导电表面在用于覆盖屏蔽区域的引线接合线的第一部分之上。
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公开(公告)号:US10325877B2
公开(公告)日:2019-06-18
申请号:US15959619
申请日:2018-04-23
Applicant: Invensas Corporation
Inventor: Javier A. Delacruz , Abiola Awujoola , Ashok S. Prabhu , Christopher W. Lattin , Zhuowen Sun
IPC: H01L23/00 , H05K1/02 , H01L23/31 , H01L23/498 , H01L25/065 , H01L25/16 , H01L23/552 , H01L25/10 , H01L25/00
Abstract: In a vertically integrated microelectronic package, a first microelectronic device is coupled to an upper surface of a circuit platform in a wire bond-only surface area thereof. Wire bond wires are coupled to and extends away from an upper surface of the first microelectronic device. A second microelectronic device in a face-down orientation is coupled to upper ends of the wire bond wires in a surface mount-only area. The second microelectronic device is located above and at least partially overlaps the first microelectronic device. A protective layer is disposed over the circuit platform and the first microelectronic device. An upper surface of the protective layer has the surface mount-only area. The upper surface of the protective layer has the second microelectronic device disposed thereon in the face-down orientation in the surface mount-only area for coupling to the upper ends of the first wire bond wires.
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公开(公告)号:US10115678B2
公开(公告)日:2018-10-30
申请号:US15804122
申请日:2017-11-06
Applicant: Invensas Corporation
Inventor: Abiola Awujoola , Zhuowen Sun , Wael Zohni , Ashok S. Prabhu , Willmar Subido
IPC: H01L23/552 , H01L23/00 , H01L25/065 , H01L25/10 , H01L23/498
Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
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公开(公告)号:US20170194281A1
公开(公告)日:2017-07-06
申请号:US14997774
申请日:2016-01-18
Applicant: Invensas Corporation
Inventor: Javier A. DeLaCruz , Abiola Awujoola , Ashok S. Prabhu , Christopher W. Lattin , Zhuowen Sun
IPC: H01L23/00 , H01L23/498 , H01L25/065 , H01L23/31 , H01L25/16
CPC classification number: H01L24/49 , H01L23/3121 , H01L23/49838 , H01L23/552 , H01L24/17 , H01L24/48 , H01L24/97 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/16 , H01L25/50 , H01L2224/04042 , H01L2224/11334 , H01L2224/16145 , H01L2224/16227 , H01L2224/17051 , H01L2224/32145 , H01L2224/32225 , H01L2224/48108 , H01L2224/48137 , H01L2224/48145 , H01L2224/48227 , H01L2224/49109 , H01L2224/73204 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06562 , H01L2225/1023 , H01L2924/00014 , H01L2924/14 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/19107 , H01L2924/3025 , H05K1/0284 , H01L2224/45099 , H01L2924/00012 , H01L2924/00
Abstract: In a vertically integrated microelectronic package, a first microelectronic device is coupled to an upper surface of a circuit platform in a wire bond-only surface area thereof. Wire bond wires are coupled to and extends away from an upper surface of the first microelectronic device. A second microelectronic device in a face-down orientation is coupled to upper ends of the wire bond wires in a surface mount-only area. The second microelectronic device is located above and at least partially overlaps the first microelectronic device. A protective layer is disposed over the circuit platform and the first microelectronic device. An upper surface of the protective layer has the surface mount-only area. The upper surface of the protective layer has the second microelectronic device disposed thereon in the face-down orientation in the surface mount-only area for coupling to the upper ends of the first wire bond wires.
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公开(公告)号:US20190027444A1
公开(公告)日:2019-01-24
申请号:US16127110
申请日:2018-09-10
Applicant: Invensas Corporation
Inventor: Abiola Awujoola , Zhuowen Sun , Wael Zohni , Ashok S. Prabhu , Willmar Subido
IPC: H01L23/552 , H01L23/00 , H01L25/065 , H01L25/03 , H01L25/10 , H01L23/498
CPC classification number: H01L23/552 , H01L23/49811 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/03 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L2224/04042 , H01L2224/05599 , H01L2224/1134 , H01L2224/12105 , H01L2224/13076 , H01L2224/13082 , H01L2224/131 , H01L2224/16145 , H01L2224/16227 , H01L2224/16265 , H01L2224/17051 , H01L2224/17181 , H01L2224/215 , H01L2224/2919 , H01L2224/32225 , H01L2224/45015 , H01L2224/48105 , H01L2224/48227 , H01L2224/48472 , H01L2224/4942 , H01L2224/73204 , H01L2224/73207 , H01L2224/73227 , H01L2224/73253 , H01L2224/73259 , H01L2224/73265 , H01L2224/73267 , H01L2224/85444 , H01L2224/85455 , H01L2225/06513 , H01L2225/06517 , H01L2225/1023 , H01L2225/1052 , H01L2924/00014 , H01L2924/01322 , H01L2924/1205 , H01L2924/1206 , H01L2924/1207 , H01L2924/181 , H01L2924/19105 , H01L2924/19107 , H01L2924/2075 , H01L2924/20751 , H01L2924/20754 , H01L2924/3025 , H01L2224/45099 , H01L2924/20752 , H01L2924/20753 , H01L2924/20755 , H01L2924/00012 , H01L2924/014 , H01L2924/00
Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
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