Abstract:
In accordance with an embodiment, a circuit element includes a flexible foldable substrate having portions of a first inductor formed on first and second major surfaces of the flexible substrate. In accordance with another embodiment, a first electrically conductive trace having a first terminal, a second terminal, and a first annular-shaped portion between the first terminal and the second terminal is formed on a first portion of the first major surface. A second electrically conductive trace having a first terminal, a second terminal, a first annular-shaped portion between the first terminal and the second terminal of the second electrically conductive trace, and a second annular-shaped portion between the first terminal and the second terminal of the second electrically conductive trace is formed on the second major surface. The first electrically conductive trace is coupled to the second electrically conductive trace by a thru-via.
Abstract:
A mechanically programmable anti-fuse is configured in a thick, top metallic layer of a semiconductor. The metallic layer is selected of a material that possesses malleable properties. The metal anti-fuse programming pad is surrounded, either wholly or in part, by a pad segment. An intervening space between the anti-fuse pad and the pad segment is selected from a predetermined value such that capillary pressure, exerted when a ball-bond is placed atop the anti-fuse pad and the pad segment, causes the pads to deform and shorts to the anti-fuse pad to the pad segment. The shorting, created during the wire bonding process, programs the anti-fuse.
Abstract:
A semiconductor device has contact between the last interconnect layer and the bond pad that includes a barrier metal between the bond pad and the last interconnect layer. Both a passivation layer and a polyimide layer separate the last interconnect layer and the bond pad. The passivation layer is patterned to form a first opening to contact the last interconnect layer. The polyimide layer is also patterned to leave a second opening that is inside and thus smaller than the first opening through the passivation. The barrier layer is then deposited in contact with the last interconnect layer and bounded by the polyimide layer. The bond pad is then formed in contact with the barrier, and a wire bond is then made to the bond pad.
Abstract:
An electronic device can include an inductor overlying a shock-absorbing layer. In one aspect, the electronic device can include a substrate, an interconnect level overlying the substrate, and the shock-absorbing layer overlying the interconnect level. The inductor can include conductive traces and looped wires. The conductive traces can be attached to the conductive traces over the shock-absorbing layer. In another aspect, a process can be used to form the electronic device including the inductor. In still another aspect, an electronic device can a toroidal-shaped inductor that includes linear inductor segments that are connected in series.
Abstract:
In accordance with an embodiment, sensor structure has a first, second, and third laminated structures. The second laminated structure is positioned between the first laminated structure and the third laminated structure. The first laminated structure includes a first portion of a first sensing element and the third laminated structure includes a second portion of the first sensing element. The second laminated structure includes spacer elements that can be used to adjust the sensitivity of the sensor structure.
Abstract:
An electronic device can include an inductor overlying a shock-absorbing layer. In one aspect, the electronic device can include a substrate, an interconnect level overlying the substrate, and the shock-absorbing layer overlying the interconnect level. The inductor can include conductive traces and looped wires. The conductive traces can be attached to the conductive traces over the shock-absorbing layer. In another aspect, a process can be used to form the electronic device including the inductor. In still another aspect, an electronic device can a toroidal-shaped inductor that includes linear inductor segments that are connected in series.
Abstract:
A semiconductor device has contact between the last interconnect layer and the bond pad that includes a barrier metal between the bond pad and the last interconnect layer. Both a passivation layer and a polyimide layer separate the last interconnect layer and the bond pad. The passivation layer is patterned to form a first opening to contact the last interconnect layer. The polyimide layer is also patterned to leave a second opening that is inside and thus smaller than the first opening through the passivation. The barrier layer is then deposited in contact with the last interconnect layer and bounded by the polyimide layer. The bond pad is then formed in contact with the barrier, and a wire bond is then made to the bond pad.
Abstract:
A semiconductor device (51) is provided. The device (51) comprises a die (53) having a contact pad (61) thereon, a redistribution conductor (59) having a base portion (64) which is in electrical communication with the contact pad (61) and a laterally extending portion (63), a bumped contact (65) which is in electrical communication with the redistribution conductor (59), and a passivation layer (57) disposed between the laterally extending portion (63) of the redistribution conductor (59) and the die (53). Preferably, the redistribution conductor (59) is convoluted and is adapted to peel or delaminate from the passivation layer (57) under sufficient stress so that it can shift relative to the passivation layer (57) and base portion (64) to relieve mechanical stress between substrate (69) and the die (53). Bump and coiled redistribution conductor (59) accommodating small CTE mis-match strain without failure allows DCA flip-chip to be reliable without underfill or additional assembly process.
Abstract:
In accordance with one embodiment, a stress buffer (40) is formed between a power metal structure (90) and passivation layer (30). The stress buffer (40) reduces the effects of stress imparted upon the passivation layer (30) by the power metal structure (90). In accordance with an alternative embodiment, a power metal structure (130A) is partitioned into segments (1091), whereby electrical continuity is maintained between the segments (1090) by remaining portions of a seed layer (1052) and adhesion/barrier layer (1050). The individual segments (1090) impart a lower peak stress than a comparably sized continuous power metal structure (9).
Abstract:
An embedded device 105 is assembled within a flexible circuit assembly 30 with the embedded device mid-plane intentionally located in proximity to the flexible circuit assembly central plane 115 to minimize stress effects on the embedded device. The opening 18, for the embedded device, is enlarged in an intermediate layer 10 to enhance flexibility of the flexible circuit assembly.