公开(公告)号：US12294024B2

公开(公告)日：2025-05-06

申请号：US17660729

申请日：2022-04-26

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Masashi Tsubuku ,  Kentaro Miura ,  Akihiro Hanada ,  Takaya Tamaru

IPC: H01L29/66 ,  H01L21/426 ,  H01L21/4757 ,  H01L21/4763 ,  H01L29/40 ,  H01L29/423 ,  H01L29/786

Abstract: According to one embodiment, a method of manufacturing a semiconductor device, includes forming a first insulating layer, an oxide semiconductor layer, a second insulating layer, a buffer layer and a metal layer sequentially on a base, forming a patterned resist on the metal layer, etching the buffer layer and the metal layer using the resist as a mask to expose an upper surface of the second insulating layer, reducing a volume of the resist to expose an upper surface along a side surface of the metal layer, etching the metal layer using the resist as a mask, to form a gate electrode and to expose an upper surface of the buffer layer, and carrying out ion implantation on the oxide semiconductor layer using the gate electrode as a mask.

公开(公告)号：US12284831B2

公开(公告)日：2025-04-22

申请号：US18487263

申请日：2023-10-16

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Toshihide Jinnai

IPC: H01L27/12 ,  H10D30/67 ,  H10D86/40 ,  H10D86/60 ,  H10D99/00

Abstract: An object of the present invention is to provide a technology using which, in a thin film transistor using oxide semiconductor, the resistance of a channel region of the oxide semiconductor is made high, and at the same time the resistances of a source region and a drain region of the oxide semiconductor are made low. There is provided a semiconductor device including: a thin film transistor including oxide semiconductor, the oxide semiconductor including a channel region, a drain region, and a source region; a gate insulating film formed on the channel region; an aluminum oxide film formed on the gate insulating film; and a gate electrode formed on the aluminum oxide film, wherein the aluminum oxide film has a region that covers neither the drain region nor the source region in a plane view.

公开(公告)号：US12224332B2

公开(公告)日：2025-02-11

申请号：US17657168

申请日：2022-03-30

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Takuo Kaitoh ,  Hajime Watakabe

IPC: H01L29/49 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/786

Abstract: The purpose of the present invention is to suppress a change in characteristics of a TFT using an oxide semiconductor film caused by that oxygen in the oxide semiconductor film is extracted by metal electrode. The main structure of the present invention is as follows. A semiconductor device having a TFT, in which a gate insulating film is formed on a gate electrode, and an oxide semiconductor film is formed on the gate insulating film; the oxide semiconductor film including a channel region, a drain region, and a source region; in which a metal nitride film is formed on a top surface of the gate electrode in an opposing portion to the channel region in a plan view; and the metal nitride film is not formed at a part of the top surface of the gate electrode.

公开(公告)号：US11855103B2

公开(公告)日：2023-12-26

申请号：US17587671

申请日：2022-01-28

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Masayoshi Fuchi

IPC: H01L27/12 ,  H01L21/02 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L29/786

CPC classification number: H01L27/124 ,  H01L21/02063 ,  H01L21/76802 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53266 ,  H01L27/1218 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1262 ,  H01L29/7869 ,  H01L29/78603 ,  H01L29/78675

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer located above the insulating substrate, a second semiconductor layer located above the insulating substrate, an insulating layer which covers the first semiconductor layer and the second semiconductor layer, and includes a first contact hole reaching the first semiconductor layer and a second contact hole reaching the second semiconductor layer, a barrier layer which covers one of the first semiconductor layer inside the first contact hole and the second semiconductor layer inside the second contact hole, and a first conductive layer which is in contact with the barrier layer.

公开(公告)号：US11846860B2

公开(公告)日：2023-12-19

申请号：US18164809

申请日：2023-02-06

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Toshihide Jinnai ,  Isao Suzumura ,  Hajime Watakabe ,  Ryo Onodera

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L29/786 ,  H10K50/86 ,  H10K59/131

CPC classification number: G02F1/1368 ,  G02F1/136209 ,  G02F1/136277 ,  G02F1/136286 ,  H01L29/78633 ,  H01L29/78672 ,  H10K50/865 ,  H10K59/131

Abstract: A display device including: a substrate; a first thin film transistor of polysilicon semiconductor, a second thin film transistor of oxide semiconductor; a first light shading film opposing to the polysilicon semiconductor, and a second light shading film opposing to the oxide semiconductor; a first insulating film, a second insulating film which is constituted from plural insulating films, and a third insulating film superposed in this order; a first through hole penetrating the second insulating film and not penetrating the first insulating film and the third insulating film; a second through hole penetrating the first insulating film and the third insulating film; the first light shading film connects with a first conductive component, a part of the first conductive component exists on the third insulating film, through the second through hole.

公开(公告)号：US10824211B2

公开(公告)日：2020-11-03

申请号：US16131477

申请日：2018-09-14

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Hajime Watakabe ,  Kazufumi Watabe

IPC: H01L27/12 ,  H04L29/08 ,  H01L29/786 ,  H01L29/423 ,  H01L29/51 ,  G06F1/26 ,  H02J13/00 ,  H04L12/24 ,  H04L12/853 ,  H04Q9/02

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.

公开(公告)号：US20180342536A1

公开(公告)日：2018-11-29

申请号：US15978464

申请日：2018-05-14

Applicant: Japan Display Inc.

Inventor： Isao Suzumura ,  Hajime Watakabe ,  Akihiro Hanada ,  Hirokazu Watanabe ,  Yohei Yamaguchi ,  Marina Shiokawa ,  Ryotaro Kimura

IPC: H01L27/12 ,  H01L29/786 ,  G02F1/1362 ,  G02F1/1368 ,  G02F1/1333

CPC classification number: H01L27/124 ,  G02F1/133305 ,  G02F1/134363 ,  G02F1/136209 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136295 ,  G02F2202/104 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/1266 ,  H01L27/127 ,  H01L27/3248 ,  H01L27/3262 ,  H01L29/78603 ,  H01L29/78618 ,  H01L29/78633 ,  H01L29/78648 ,  H01L29/78678 ,  H01L29/7869

Abstract: The purpose of the invention is to form a flexible display device where the substrate is made of resin, wherein the TFT can be annealed in high temperature; consequently, a reliability of the TFT is improved. The concrete measure is as follows. A display device having a pixel electrode and a TFT including a semiconductor layer on a substrate comprising: a source region of the semiconductor layer connects with a source electrode, a drain region of the semiconductor layer connects with a drain electrode; the pixel electrode connects with the source electrode; the drain electrode connects with a video signal line; a distance between the drain electrode and the substrate is smaller than a distance between the semiconductor and the substrate, the semiconductor layer is formed between the pixel electrode and the substrate.

公开(公告)号：US20180286890A1

公开(公告)日：2018-10-04

申请号：US15923026

申请日：2018-03-16

Applicant: Japan Display Inc.

Inventor： Isao Suzumura ,  Yohei Yamaguchi ,  Hajime Watakabe ,  Akihiro Hanada ,  Hirokazu Watanabe ,  Marina Shiokawa

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/49 ,  H01L21/02 ,  H01L21/465 ,  H01L21/4763 ,  H01L29/66

Abstract: The purpose of the invention is to improve reliability of the TFT of the oxide semiconductor. The invention is characterized as follows. A display device comprising: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor; a first gate insulating film is formed on the first oxide semiconductor, a gate electrode is formed on the first gate insulating film, an interlayer insulating film is formed over the gate electrode; the gate insulating film includes a first silicon oxide film, the gate electrode includes a first gate layer made of a second oxide semiconductor and a second gate layer made of metal or alloy; the interlayer insulating film has a first interlayer insulating film including a second silicon oxide film, and a second interlayer insulating film including a first aluminum oxide film on the first interlayer insulating film.

公开(公告)号：US09911859B2

公开(公告)日：2018-03-06

申请号：US14944711

申请日：2015-11-18

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Arichika Ishida ,  Takashi Okada ,  Masayoshi Fuchi ,  Akihiro Hanada

IPC: H01L29/10 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606

Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the same achieve size reduction of the thin-film transistor while using an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. A gate electrode is arranged at a position spaced from the channel region of the oxide semiconductor layer so as to face the channel region. A source electrode is electrically connected to the source region of the oxide semiconductor layer. A drain electrode is electrically connected to the drain region of the oxide semiconductor layer. An undercoat layer adjoins the source region and the drain region of the oxide semiconductor layer. A hydrogen blocking layer has a hydrogen concentration lower than that in the undercoat layer and separates the undercoat layer and the channel region of the oxide semiconductor layer.

公开(公告)号：US12237345B2

公开(公告)日：2025-02-25

申请号：US18366859

申请日：2023-08-08

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Isao Suzumura ,  Akihiro Hanada ,  Yohei Yamaguchi

IPC: H01L27/12 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786

Abstract: A display device including a substrate having thin film transistors (TFT) comprising: the TFT including an oxide semiconductor film, a gate electrode and an insulating film formed between the oxide semiconductor film and the gate electrode, wherein a first aluminum oxide film and a second aluminum oxide film, which is formed on the first aluminum oxide film, are formed between the insulating film and the gate electrode, an oxygen concentration in the first aluminum oxide film is bigger than an oxygen concentration in the second aluminum oxide film.