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公开(公告)号:US12130484B2
公开(公告)日:2024-10-29
申请号:US17942404
申请日:2022-09-12
Applicant: Lightmatter, Inc.
Inventor: Nicholas C. Harris , Carl Ramey
IPC: G02B6/42
CPC classification number: G02B6/4274 , G02B6/4249 , G02B6/4286
Abstract: Described herein are techniques for yield enhancement in photonic communications platforms. A photonic communication platform may include a photonic substrate patterned with a plurality of photonic modules including at least first and second photonic modules, wherein the first and second photonic modules are copies of a common template photonic module. Yield enhancement may be accomplished using photonic redundancy and/or electronic redundancy. Photonic redundancy may involve redundant optical lanes provided in parallel to primary optical lanes. Electronic redundancy may involve use of additional electronic circuits or wires running in parallel to electronic circuits or wires. Defective circuits may be disabled to prevent negative impacts on other parts of the electronic system. This can be done by providing power-isolating switches that completely disable and isolate the defective circuits.
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公开(公告)号:US20240353614A1
公开(公告)日:2024-10-24
申请号:US18638820
申请日:2024-04-18
Applicant: Lightmatter, Inc.
Inventor: Darius Bunandar , Shashank Gupta , Jessie Rosenberg , Clifford Chao , Kuang Liu , Nicholas C. Harris
CPC classification number: G02B6/12002 , H04B10/40 , H04B10/802 , G02B2006/12038
Abstract: Described herein photonic interconnects based on glass interposers. Glass interposers of the types described herein are used to photonically interconnect multiple smaller photonic integrated circuits (PIC), as opposed to using a single, larger PIC. The typical yield of a glass interposer is significantly higher than the yield of a PIC. This is because glass interposers are passive in nature, while PICs include active photonic elements. Active photonic components (e.g., photonic transceivers and switches) tend to be more susceptible to manufacturing defects than passive photonic components (e.g., waveguides and couplers) because active components require additional manufacturing steps (e.g., ion implantation, sputtering, epitaxial growth, etc.). The approach described herein improves performance because instead of having to slice a large number of continuous reticles from a wafer, one can pick and choose reticles known to have yielded.
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公开(公告)号:US20240219635A1
公开(公告)日:2024-07-04
申请号:US18606188
申请日:2024-03-15
Applicant: Lightmatter, Inc.
Inventor: Nicholas C. Harris , Carl Ramey , Michael Gould , Thomas Graham , Darius Bunandar , Ryan Braid , Mykhailo Tymchenko
CPC classification number: G02B6/1225 , G02B6/12004 , G02B6/12007 , G02B6/13 , G02B6/136 , H01L21/0275 , H04J14/02
Abstract: Described herein are photonic communication platforms that can overcome the memory bottleneck problem, thereby enabling scaling of memory capacity and bandwidth well beyond what is possible with conventional computing systems. Some embodiments provide photonic communication platforms that involve use of photonic modules. Each photonic module includes programmable photonic circuits for placing the module in optical communication with other modules based on the needs of a particular application. The architecture developed by the inventors relies on the use of common photomask sets (or at least one common photomask) to fabricate multiple photonic modules in a single wafer. Photonic modules in multiple wafers can be linked together into a communication platform using optical or electronic means.
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公开(公告)号:US20240187111A1
公开(公告)日:2024-06-06
申请号:US18441231
申请日:2024-02-14
Applicant: Lightmatter, Inc.
Inventor: Darius Bunandar , Nicholas C. Harris , Michael Gould , Carl Ramey , Tomo Lazovich
CPC classification number: H04B10/801 , G06F1/28 , H03K19/21
Abstract: Systems and methods for performing signed matrix operations using a linear photonic processor are provided. The linear photonic processor is formed as an array of first amplitude modulators and second amplitude modulators, the first amplitude modulators configured to encode elements of a vector into first optical signals and the second amplitude modulators configured to encode a product between the vector elements and matrix elements into second optical signals. An apparatus may be used to implement a signed value of an output of the linear processor. The linear photonic processor may be configured to perform matrix-vector and/or matrix-matrix operations.
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公开(公告)号:US20240176066A1
公开(公告)日:2024-05-30
申请号:US18434443
申请日:2024-02-06
Applicant: Lightmatter, Inc.
Inventor: Sukeshwar Kannan , Carl Ramey , Jon Elmhurst , Darius Bunandar , Nicholas C. Harris
CPC classification number: G02B6/12 , H01L23/50 , H05K1/183 , G02B6/4274 , H01L23/13 , H01L23/5383 , H01L23/5384 , H01L23/5385 , H01L25/167 , H01L2924/15153
Abstract: Described herein are photonic communication platforms and related packages. In one example, a photonic package includes a substrate carrier having a recess formed through the top surface of the substrate carrier. The substrate carrier may be made of a ceramic laminate. A photonic substrate including a plurality of photonic modules is disposed in the recess. The photonic modules may be patterned using a common photomask, and as a result, may share a same layer pattern. A plurality of electronic dies may be positioned on top of respective photonic modules. The photonic modules enable communication among the dies in the optical domain. Power delivery substrates may be used to convey electric power from the substrate carrier to the electronic dies and to the photonic substrate. Power delivery substrates may be implemented, for example, using bridge dies or interposers (e.g., silicon or organic interposers).
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公开(公告)号:USD1018522S1
公开(公告)日:2024-03-19
申请号:US29801802
申请日:2021-07-30
Applicant: Lightmatter, Inc.
Designer: Nicholas C. Harris , Darius Bunandar , Jon Marshall , Natasha Jen , Yemima Lorberbaum , Guy Naor , Stephanie Joanne Hamilton-Jones
Abstract: FIG. 1 is a top, front, left side perspective view of a computer chassis;
FIG. 2 is a front view thereof;
FIG. 3 is a rear view thereof;
FIG. 4 is a left side view thereof;
FIG. 5 is a right side view thereof;
FIG. 6 is a top view thereof;
FIG. 7 is a bottom view thereof;
FIG. 8 shows the front view of FIG. 2 on an enlarged scale;
FIG. 9 shows the rear view of FIG. 3 on an enlarged scale;
FIG. 10 shows a dash-dot-dot rectangle identifying a portion of FIG. 8; and,
FIG. 11 shows the portion identified in FIG. 10 on a further enlarged scale.
The dot-dash broken lines in the figures represent boundaries of the claimed design and form no part thereof. The “11” and the associated dash-dot-dot line shown in FIG. 10, as well as the dash-dot-dot rectangle identifying and displaying the enlarged region, form no part of the claimed design. All other broken lines and surfaces without surface shading illustrate portions of the computer chassis that form no part of the claimed design.-
公开(公告)号:US11936434B2
公开(公告)日:2024-03-19
申请号:US18139431
申请日:2023-04-26
Applicant: Lightmatter, Inc.
Inventor: Darius Bunandar , Nicholas C. Harris , Michael Gould , Carl Ramey , Tomo Lazovich
CPC classification number: H04B10/801 , G06F1/28 , H03K19/21
Abstract: Systems and methods for performing signed matrix operations using a linear photonic processor are provided. The linear photonic processor is formed as an array of first amplitude modulators and second amplitude modulators, the first amplitude modulators configured to encode elements of a vector into first optical signals and the second amplitude modulators configured to encode a product between the vector elements and matrix elements into second optical signals. An apparatus may be used to implement a signed value of an output of the linear processor. The linear photonic processor may be configured to perform matrix-vector and/or matrix-matrix operations.
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公开(公告)号:US11860413B2
公开(公告)日:2024-01-02
申请号:US18070889
申请日:2022-11-29
Applicant: Lightmatter, Inc.
Inventor: Nicholas C. Harris , Carl Ramey , Michael Gould , Thomas Graham , Darius Bunandar , Ryan Braid , Mykhailo Tymchenko
CPC classification number: G02B6/1225 , G02B6/12004 , G02B6/12007 , G02B6/13 , G02B6/136 , H01L21/0275 , H04J14/02
Abstract: Described herein are photonic communication platforms that can overcome the memory bottleneck problem, thereby enabling scaling of memory capacity and bandwidth well beyond what is possible with conventional computing systems. Some embodiments provide photonic communication platforms that involve use of photonic modules. Each photonic module includes programmable photonic circuits for placing the module in optical communication with other modules based on the needs of a particular application. The architecture developed by the inventors relies on the use of common photomask sets (or at least one common photomask) to fabricate multiple photonic modules in a single wafer. Photonic modules in multiple wafers can be linked together into a communication platform using optical or electronic means.
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公开(公告)号:US20230353252A1
公开(公告)日:2023-11-02
申请号:US18139431
申请日:2023-04-26
Applicant: Lightmatter, Inc.
Inventor: Darius Bunandar , Nicholas C. Harris , Michael Gould , Carl Ramey , Tomo Lazovich
CPC classification number: H04B10/801 , G06F1/28 , H03K19/21
Abstract: Systems and methods for performing signed matrix operations using a linear photonic processor are provided. The linear photonic processor is formed as an array of first amplitude modulators and second amplitude modulators, the first amplitude modulators configured to encode elements of a vector into first optical signals and the second amplitude modulators configured to encode a product between the vector elements and matrix elements into second optical signals. An apparatus may be used to implement a signed value of an output of the linear processor. The linear photonic processor may be configured to perform matrix-vector and/or matrix-matrix operations.
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公开(公告)号:US11754783B2
公开(公告)日:2023-09-12
申请号:US17313415
申请日:2021-05-06
Applicant: Lightmatter, Inc.
Inventor: Nicholas C. Harris , Carl Ramey , Michael Gould , Thomas Graham , Darius Bunandar , Ryan Braid , Mykhailo Tymchenko
CPC classification number: G02B6/1225 , G02B6/12004 , G02B6/12007 , G02B6/13 , G02B6/136 , H01L21/0275 , H04J14/02
Abstract: Described herein are photonic communication platforms that can overcome the memory bottleneck problem, thereby enabling scaling of memory capacity and bandwidth well beyond what is possible with conventional computing systems. Some embodiments provide photonic communication platforms that involve use of photonic modules. Each photonic module includes programmable photonic circuits for placing the module in optical communication with other modules based on the needs of a particular application. The architecture developed by the inventors relies on the use of common photomask sets (or at least one common photomask) to fabricate multiple photonic modules in a single wafer. Photonic modules in multiple wafers can be linked together into a communication platform using optical or electronic means.
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