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    3D memory program disturbance improvement
    1.
    发明授权
    3D memory program disturbance improvement 有权

    公开(公告)号：US11282581B1

    公开(公告)日：2022-03-22

    申请号：US17140825

    申请日：2021-01-04

    Applicant: MACRONIX INTERNATIONAL CO., LTD.

    Inventor： Han-Sung Chen ,  Chien-Fu Huang

    IPC: G11C16/04 ,  G11C16/34 ,  G11C16/10 ,  G11C16/08

    Abstract: A memory device has a plurality of blocks of memory cells and a plurality of bit lines, each block including a group of word lines, and a set of NAND strings. Each block in the plurality of blocks of memory cells has a plurality of sub-blocks, each sub-block including a distinct subset of the set of NAND strings of the block selected, and a respective sub-block string select line. Control circuits are configured to execute a program operation including applying word line voltages and string select line voltages at a precharge level to precharge the set of NAND strings in the selected block, then lowering the gate voltages on all the sub-block string select lines of the block, and then lowering the word line voltages on the group of word lines. Thereafter, the program of cells in a selected sub-block is executed.

    Metal capacitor
    2.
    发明授权
    Metal capacitor 有权

    公开(公告)号：US11152458B2

    公开(公告)日：2021-10-19

    申请号：US16784292

    申请日：2020-02-07

    Applicant: MACRONIX INTERNATIONAL CO., LTD.

    Inventor： Chung-Kuang Chen ,  Chia-Ching Li ,  Chien-Fu Huang ,  Chia-Ming Hu

    IPC: H01L49/02 ,  H01L23/522 ,  H01G4/232 ,  H01L27/06

    Abstract: A metal capacitor provided includes a first metal layer and a second metal layer disposed above a substrate. The first metal layer includes a first electrode sheet and a second electrode sheet, and the second metal layer includes a third electrode sheet and a fourth electrode sheet. The first electrode sheet and the second electrode sheet collectively form a first coplanar capacitor. The third electrode sheet and the fourth electrode sheet collectively form a second coplanar capacitor. At least a portion of the fourth electrode sheet is arranged above the first electrode sheet, and the first electrode sheet and the fourth electrode sheet collectively form a first vertical capacitor. At least a portion of the third electrode sheet is arranged above the second electrode sheet, and the second electrode sheet and the third electrode sheet collectively form a second vertical capacitor.

    Temperature sensor and memory device having same
    3.
    发明授权
    Temperature sensor and memory device having same 有权

    公开(公告)号：US12061125B2

    公开(公告)日：2024-08-13

    申请号：US17011864

    申请日：2020-09-03

    Applicant: MACRONIX INTERNATIONAL CO., LTD.

    Inventor： Chia-Ming Hu ,  Chung-Kuang Chen ,  Chia-Ching Li ,  Chien-Fu Huang

    IPC: G01K7/42 ,  H10B43/40 ,  H10B51/40

    CPC classification number: G01K7/425 ,  H10B43/40 ,  H10B51/40

    Abstract: An integrated circuit includes a memory and peripheral circuits with a temperature sensor used to automatically adjust operating voltages. The temperature sensor includes a reference circuit that generates a first reference with a first non-zero temperature coefficient and a second reference with a second temperature coefficient having a different magnitude than the first non-zero temperature coefficient. A detector circuit on the integrated circuit, having temperature and process variation compensation, converts a difference between the first and second references into a digital signal indicating temperature on the integrated circuit.

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