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公开(公告)号:US09405639B2
公开(公告)日:2016-08-02
申请号:US14588869
申请日:2015-01-02
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Tieniu Li
CPC classification number: G06F11/2017 , G06F11/073 , G06F11/076 , G06F11/1068 , G06F2201/85 , G11C16/349
Abstract: Apparatus and methods, such as those that read data from non-volatile integrated circuit memory devices, such as NAND flash. For example, disclosed techniques can be embodied in a device driver of an operating system. Errors are tracked during read operations. If sufficient errors are observed during read operations, the block is then retired when it is requested to be erased or a page of the block is to be written. One embodiment is a technique to recover data from uncorrectable errors. For example, a read mode can be changed to a more reliable read mode to attempt to recover data. One embodiment further returns data from the memory device regardless of whether the data was correctable by decoding of error correction code data or not.
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公开(公告)号:US20250094075A1
公开(公告)日:2025-03-20
申请号:US18782525
申请日:2024-07-24
Applicant: Micron Technology, Inc.
Inventor: Robert Winston Mason , Tieniu Li
IPC: G06F3/06
Abstract: Methods, systems, and devices for methods for performing voltage sweep operations are described. Based on detecting a failure at a portion of a memory device, the memory system controller may initialize a voltage sweep operation to identify threshold voltages of the memory cells at the portion of the memory device. In one example, the memory system controller may identify and store a value (e.g., a delta value) that represents a difference between a quantity of transitions experienced by a first memory cell at a first voltage iteration and a quantity of transitions experienced by the first memory cell at a second voltage iteration. In another example, the memory system controller may identify the quantity of transitions from a first logic state to a second logic state and a quantity of transitions from the second logic state to a first logic state and store such values in respective memory arrays.
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公开(公告)号:US20150121128A1
公开(公告)日:2015-04-30
申请号:US14588869
申请日:2015-01-02
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Tieniu Li
IPC: G06F11/20
CPC classification number: G06F11/2017 , G06F11/073 , G06F11/076 , G06F11/1068 , G06F2201/85 , G11C16/349
Abstract: Apparatus and methods, such as those that read data from non-volatile integrated circuit memory devices, such as NAND flash. For example, disclosed techniques can be embodied in a device driver of an operating system. Errors are tracked during read operations. If sufficient errors are observed during read operations, the block is then retired when it is requested to be erased or a page of the block is to be written. One embodiment is a technique to recover data from uncorrectable errors. For example, a read mode can be changed to a more reliable read mode to attempt to recover data. One embodiment further returns data from the memory device regardless of whether the data was correctable by decoding of error correction code data or not.
Abstract translation: 诸如从非易失性集成电路存储器件(例如NAND闪存)读取数据的装置和方法。 例如,所公开的技术可以体现在操作系统的设备驱动器中。 在读取操作期间跟踪错误。 如果在读取操作期间观察到足够的错误,则当请求被擦除或要写入块的页面时,该块将被退出。 一个实施例是从不可校正错误中恢复数据的技术。 例如,可以将读取模式改变为更可靠的读取模式以尝试恢复数据。 一个实施例进一步从存储器件返回数据,而不管数据是否可通过对纠错码数据进行解码来校正。
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