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公开(公告)号：US10826616B2
公开(公告)日：2020-11-03
申请号：US16376504
申请日：2019-04-05
Applicant: Maxlinear, Inc.
Inventor： Ioannis Spyropoulos , Anand Anandakumar
IPC: H04B10/564 , H04B1/04 , H04B10/58
Abstract: A system comprises a digital predistortion circuit comprising: a first quantity of delay circuits configured to delay a signal to be predistorted; a second quantity of filter tap circuits, wherein the second quantity is smaller than the first quantity; and a delay-to-filter-taps mapping circuit that is operable to map each output of a first subset of the delay circuits to a corresponding input of the filter tap circuits. The system may comprise circuitry operable to select which of the first quantity of delay circuits is in the first subset. The selection of which of the first quantity of delay circuits is in the first subset may be based on a temperature measurement. The digital predistortion circuit may comprise cross-term generation circuitry operable to generate cross-term signals corresponding to the cross products of multiple, differently-delayed versions of a signal input to the digital predistortion circuit.
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公开(公告)号：US10349112B2
公开(公告)日：2019-07-09
申请号：US16110593
申请日：2018-08-23
Applicant: Maxlinear, Inc.
Inventor： Anand Anandakumar , Sheng Ye , Curtis Ling
IPC: G06F3/00 , H04N21/426 , H04N5/44 , H04N5/50 , H04N21/438 , H04N21/443 , H04N21/462 , H04N21/61
Abstract: Methods and systems for multi-path video and network channels may comprise a communication device comprising a wideband tuner (WB) and a narrowband tuner (NB). A video channel and a network channel may be received in the WB when the device is operating in a first stage. A video channel and a network channel may be received in the WB and the network channel may also be received in the NB when the device is operating in a second stage. The network channel may be received in the NB when the device is operating in a third stage. The reception of the network channel from both the WB and NB may enable a continuous reception of the network channel in a transition between the first and third stages. The WB may be operable to receive a plurality of channels and the NB may be operable to receive a single channel.
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3.发明申请公开(公告)号：US20190044525A1
公开(公告)日：2019-02-07
申请号：US16154167
申请日：2018-10-08
Applicant: Maxlinear, Inc.
Inventor： Pawandeep Taluja , Mingrui Zhu , Xuefeng Chen , Anand Anandakumar , Sheng Ye , Timothy Gallagher
Abstract: Methods and systems for time interleaved analog-to-digital converter timing mismatch calibration and compensation may include receiving an analog signal on a chip, converting the analog signal to a digital signal utilizing a time interleaved analog-to-digital-converter (ADC), and reducing a blocker signal that is generated by timing offsets in the time interleaved ADC by estimating complex coupling coefficients between a desired digital output signal and the blocker signal utilizing a decorrelation algorithm on frequencies within a desired frequency bandwidth. The decorrelation algorithm may comprise a symmetric adaptive decorrelation algorithm. The received analog signal may be generated by a calibration tone generator on the chip. An aliased signal may be summed with an output signal from a multiplier. The complex coupling coefficients may be determined utilizing the decorrelation algorithm on the summed signals. A multiplier may be configured to cancel the blocker signal utilizing the determined complex coupling coefficients.
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公开(公告)号：US09791574B2
公开(公告)日：2017-10-17
申请号：US14739659
申请日：2015-06-15
Applicant: Maxlinear, Inc.
Inventor： Maxime Leclercq , Ioannis Spyropoulos , Nishant Kumar , Anand Anandakumar
CPC classification number: G01S19/46 , H04B7/1853 , H04B7/18547 , H04W64/006
Abstract: Methods and systems for repurposing of a global navigation satellite system receiver for receiving low-earth orbit (LEO) communication satellite timing signals may comprise receiving a medium Earth orbit (MEO) satellite signal and/or a LEO signal in a receiver of the communication device. The MEO or LEO signal may be down-converted, and a position of the communication device may be calculated utilizing the down-converted signal. The signal may be down-converted utilizing a local oscillator signal generated by a phase locked loop (PLL), which may be delta-sigma modulated via a fractional-N divider. A clock signal may be communicated to the PLL utilizing a temperature-compensated crystal oscillator. The signal may be down-converted to an intermediate frequency or down-converted directly to baseband frequencies. The signal may be processed utilizing surface acoustic wave (SAW) filters. In-phase and quadrature signals may be processed in the RF path utilizing a two-stage polyphase filter.
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公开(公告)号：US20170111190A1
公开(公告)日：2017-04-20
申请号：US15392421
申请日：2016-12-28
Applicant: Maxlinear, Inc.
Inventor： Ioannis Spyropoulos , Anand Anandakumar
CPC classification number: H04L25/03184 , H04B1/16
Abstract: An electronic receiver may generate a differential detection sequence based on a received symbol sequence and based on a m-symbol delayed version of the received symbol sequence, where m is an integer greater than 1. The particular differential detection sequence may be a result of an element-by-element multiplication of the particular received symbol sequence and the conjugate of an m-symbol delayed version of the particular received symbol sequence. The receiver may calculate differential decision metrics based on the differential detection sequence and based on a set of differential symbol sequences generated from the set of possible transmitted symbol sequences. The receiver may generate a decision as to which of a set of possible transmitted symbol sequences resulted in the received symbol sequence, where the decision is based on the differential decision metrics and the set of possible transmitted symbols sequences.
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Patent Agency Ranking
6.发明申请公开(公告)号：US20160205223A1
公开(公告)日：2016-07-14
申请号：US15075258
申请日：2016-03-21
Applicant: MaxLinear, Inc.
Inventor： Anand Anandakumar , Serdar Yilmaz , Chi-Foun Kuen , Ravi Aripirala
IPC: H04L29/06 , H04L12/933 , H04N21/434 , H04N21/426 , H04N21/438 , H04N21/4385 , H04J3/06 , H04L12/46
CPC classification number: H04L69/22 , H04J3/0658 , H04L12/4633 , H04L29/06176 , H04L49/101 , H04L65/607 , H04L69/28 , H04N5/44 , H04N5/455 , H04N21/4263 , H04N21/4343 , H04N21/4346 , H04N21/4382 , H04N21/4385
Abstract: An integrated circuit may comprise a tuner operable to digitize a band of frequencies comprising a plurality of television channels, a crossbar operable to select one or more of the plurality of television channels output by the tuner, a plurality of demodulators operable to receive the selected one or more television channels from the crossbar and demodulate the selected one or more television channels to recover a plurality of transport streams, a transport module operable to multiplex the plurality of transport streams into a single packet stream, and a framer operable to: encapsulate packets of the plurality of transport streams into transport stream frames of a serial datastream, and insert filler frames into the serial datastream after every Nth transport stream frame of the serial datastream, where N is an integer.
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公开(公告)号：US09391767B2
公开(公告)日：2016-07-12
申请号：US14697569
申请日：2015-04-27
Applicant: MaxLinear, Inc.
Inventor： Seung-Chul Hong , Anand Anandakumar , Curtis Ling
CPC classification number: H04L1/0023 , H04L5/0007 , H04L7/0016 , H04L25/0216 , H04L27/265 , H04L27/2665 , H04L27/2671 , H04L27/2695
Abstract: Systems and methods for adjusting timing in a communication system, such as an OFDM system are described. In one implementation an error signal is generated to adjust the timing of a variable rate interpolator so as to adjust FFT timing. The error signal may be based on detection of significant peaks in an estimate of the impulse response of the channel, with the peak locations being tracked over subsequent symbols and the system timing adjusted in response to changes in the peaks.
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公开(公告)号：US20150207650A1
公开(公告)日：2015-07-23
申请号：US14602837
申请日：2015-01-22
Applicant: MaxLinear, Inc.
Inventor： Ioannis Spyropoulos , Anand Anandakumar
IPC: H04L25/03
CPC classification number: H04L25/03184 , H04B1/16
Abstract: An electronic receiver may generate a differential detection sequence based on a received symbol sequence and based on a m-symbol delayed version of the received symbol sequence, where m is an integer greater than 1. The particular differential detection sequence may be a result of an element-by-element multiplication of the particular received symbol sequence and the conjugate of an m-symbol delayed version of the particular received symbol sequence. The receiver may calculate differential decision metrics based on the differential detection sequence and based on a set of differential symbol sequences generated from the set of possible transmitted symbol sequences. The receiver may generate a decision as to which of a set of possible transmitted symbol sequences resulted in the received symbol sequence, where the decision is based on the differential decision metrics and the set of possible transmitted symbols sequences.
Abstract translation: 电子接收机可以基于接收到的符号序列并基于接收符号序列的m符号延迟版本来生成差分检测序列，其中m是大于1的整数。特定的差分检测序列可以是 特定接收符号序列的逐个元素乘法和特定接收符号序列的m符号延迟版本的共轭。 接收机可以基于差分检测序列并且基于从该组可能发送的符号序列生成的一组差分符号序列来计算差分决策度量。 接收机可以产生关于一组可能的传输符号序列中的哪一个导致接收到的符号序列的决定，其中该决定基于差分决策度量和可能发送的符号序列的集合。
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9.发明申请METHOD AND SYSTEM FOR RECEIVER CONFIGURATION BASED ON A PRIORI KNOWLEDGE OF NOISE 有权基于先验知识的接收机配置方法与系统公开(公告)号：US20150156558A1
公开(公告)日：2015-06-04
申请号：US14616397
申请日：2015-02-06
Applicant: MaxLinear, Inc.
Inventor： Anand Anandakumar , Ioannis Spyropoulos , Meetul Parikh
IPC: H04N21/647 , H04N21/442 , H04N21/61 , H04N21/438
CPC classification number: H04N21/64738 , H04N21/438 , H04N21/44209 , H04N21/6143
Abstract: A signal receiver may be configured to determine when signal generation adjustments directed to particular components of signals received by the signal receiver, cause performance changes relating to effects of the signal generation adjustments on other components of the received signals. Operations of the signal receiver may then be controlled based on the performance changes, to mitigate at least some of the effects on the one or more other components of the signals. The performance changes may comprise amplitude glitches, phase glitches, and/or bit or packet errors. The signal generation adjustments may comprise channel-to-frequency re-assignment. Controlling operations of the signal receiver may comprise adjusting such parameters as amplification gain and/or tracking loop bandwidth, and/or determining whether (or not) to ignore bit/packet errors.
Abstract translation: 信号接收机可以被配置为确定何时针对由信号接收机接收到的信号的特定分量的信号产生调整导致与信号生成调整对接收信号的其他分量的影响有关的性能改变。 然后可以基于性能变化来控制信号接收机的操作，以减轻对信号的一个或多个其它组件的至少一些影响。 性能变化可能包括幅度毛刺，相位毛刺和/或位或数据包错误。 信号产生调整可以包括频率到频率的重新分配。 信号接收机的控制操作可以包括调整诸如放大增益和/或跟踪环路带宽之类的参数，和/或确定是否（或不））忽略比特/分组错误。
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公开(公告)号：US20190312650A1
公开(公告)日：2019-10-10
申请号：US16379759
申请日：2019-04-09
Applicant: Maxlinear, Inc.
Inventor： Ioannis Spyropoulos , Anand Anandakumar
IPC: H04B10/564
Abstract: A calibration system comprises control circuitry and waveform capture circuitry. The control circuitry selects a first calibration waveform for input to a digital predistortion circuit of a transmitter. The capture circuitry captures a first waveform output by the transmitter in response to the first calibration waveform. The control circuitry compares the first calibration waveform to the captured first waveform. The control circuitry selects a first one of a plurality of mapping circuit configurations based on the result of the comparison, wherein the mapping circuit is configured to map outputs of a plurality of delay circuits among inputs of a plurality of filter taps. The control circuitry stores the one of the mapping circuit configurations in nonvolatile memory associated with the transmitter.
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