公开(公告)号：US20190341927A1

公开(公告)日：2019-11-07

申请号：US16403812

申请日：2019-05-06

Applicant: Maxlinear, Inc.

Inventor： Rakesh Kumar Palani ,  Suman Sah

IPC: H03M1/66 ,  H03M7/16 ,  G06F7/58

Abstract: A system comprises an input shuffling circuit and digital-to-analog conversion circuitry. The input shuffling circuit comprises a data input, a data output, and a control input. The input shuffling circuit is operable to receive, via the data input, an N-bit binary value, where N is an integer. The input shuffling circuit is operable to route each of the N bits of the N-bit binary word to one or more of M bits of the data output to generate an M-bit value, where M=2N, and the routing is based on a control value applied to the control input. The input shuffling circuit can be configured either in a dynamic element matching (DEM) mode or a regular binary to thermometer mode. The digital-to-analog conversion circuitry is operable to convert the M-bit value to a corresponding analog voltage and/or current. M different values of the control value may result in M different routings of the N bits of the binary word.

公开(公告)号：US10742229B2

公开(公告)日：2020-08-11

申请号：US16403812

申请日：2019-05-06

Applicant: Maxlinear, Inc.

Inventor： Rakesh Kumar Palani ,  Suman Sah

IPC: H03M1/66 ,  G06F7/58 ,  H03M7/16

Abstract: A system includes an input shuffling circuit and digital-to-analog conversion circuitry. The input shuffling circuit includes a data input, a data output, and a control input. The input shuffling circuit is operable to receive, via the data input, an N-bit binary value, where N is an integer. The input shuffling circuit is operable to route each of the N bits of the N-bit binary word to one or more of M bits of the data output to generate an M-bit value, where M=2N, and the routing is based on a control value applied to the control input. The input shuffling circuit can be configured either in a dynamic element matching (DEM) mode or a regular binary to thermometer mode. The digital-to-analog conversion circuitry is operable to convert the M-bit value to a corresponding analog voltage and/or current. M different values of the control value may result in M different routings of the N bits of the binary word.

公开(公告)号：US10763883B2

公开(公告)日：2020-09-01

申请号：US16425863

申请日：2019-05-29

Applicant: Maxlinear, Inc.

Inventor： Baradwaj Vigraham ,  Rakesh Kumar Palani ,  Suman Sah

IPC: H03M1/66 ,  H03H17/02

Abstract: A digital-to-analog conversion circuit (DAC) is operable to convert an input digital signal to an output analog signal. The DAC includes a digital signal processing circuit operable to process the input digital signal according to a first transfer function to generate a first processed digital signal and process the digital input signal according to a second transfer function to generate a second processed digital signal. The DAC includes a first unit DAC operable to convert the first processed digital signal to a first intermediate analog signal, and a second unit DAC operable to convert the second processed digital signal to a second intermediate analog signal. The DAC includes switching circuits and a combiner circuit to generate the output analog signal from the intermediate analog signals.

公开(公告)号：US20190372585A1

公开(公告)日：2019-12-05

申请号：US16425863

申请日：2019-05-29

Applicant: Maxlinear, Inc.

Inventor： Baradwaj Vigraham ,  Rakesh Kumar Palani ,  Suman Sah

IPC: H03M1/66 ,  H03H17/02

Abstract: A digital-to-analog conversion circuit (DAC) is operable to convert an input digital signal to an output analog signal. The DAC comprises a digital signal processing circuit operable to process the input digital signal according to a first transfer function to generate a first processed digital signal and process the digital input signal according to a second transfer function to generate a second processed digital signal. The DAC comprises a first unit DAC operable to convert the first processed digital signal to a first intermediate analog signal, and a second unit DAC operable to convert the second processed digital signal to a second intermediate analog signal. The DAC comprises switching circuits and a combiner circuit to generate the output analog signal from the intermediate analog signals.

公开(公告)号：US20190326923A1

公开(公告)日：2019-10-24

申请号：US16389808

申请日：2019-04-19

Applicant: Maxlinear, Inc.

Inventor： Baradwaj Vigraham ,  Rakesh Kumar Palani ,  Suman Sah

IPC: H03M1/78

Abstract: A system (e.g., a transmitter system on chip) comprises a digital-to-analog converter configured to convert an N-bit digital signal to a corresponding analog signal, where N is an integer greater than 1. The digital-to-analog converter may comprise N bias circuits, where each of the bias circuits is configured to generate a bias current, and route the bias current based on a value of a respective one of the N bits of the N-bit digital signal. Each of the N bias circuits may comprises a resistor network and a pair of switching circuits.