COOPERATIVE MEMORY ERROR DETECTION AND REPAIR
    1.
    发明申请
    COOPERATIVE MEMORY ERROR DETECTION AND REPAIR 有权
    合作记忆错误检测和修复

    公开(公告)号:US20140281686A1

    公开(公告)日:2014-09-18

    申请号:US13804071

    申请日:2013-03-14

    Inventor: Kurt Ware

    Abstract: Some embodiments include apparatuses and methods having a memory structure included in a memory device and a control unit included in the memory device. The control unit can provide information obtained from the memory structure during a memory operation to a host device (e.g., a processor) in response to a command from the host device. If the control unit receives a notification from the host device indicating that the host device has detected an error in the information obtained from the memory structure, then a repair unit included in the memory device performs a memory repair operation to repair a portion in the memory structure.

    Abstract translation: 一些实施例包括具有包括在存储器件中的存储器结构的装置和方法以及包括在存储器件中的控制单元。 响应于来自主机设备的命令,控制单元可以在存储器操作期间从存储器结构获得的信息提供给主机设备(例如,处理器)。 如果控制单元从主机设备接收到指示主机设备已经从存储器结构获得的信息中检测到错误的通知,则存储器件中包括的修复单元执行存储器修复操作以修复存储器中的一部分 结构体。

    APPARATUSES AND METHODS TO CHANGE INFORMATION VALUES

    公开(公告)号:US20180316465A1

    公开(公告)日:2018-11-01

    申请号:US16028133

    申请日:2018-07-05

    Abstract: Some embodiments include apparatuses and methods having a component to change a value of a bit among a number of M bits of information when the M bits have the same value and when M exceeds a selected value. At least one of such embodiments can include a transmitting component to provide the information to a connection. At least one of such embodiments can include a receiving component to receive the information from the connection. In at least one of such embodiments, the selected value can include a maximum number of consecutive bits having the same value that such a receiving component can be configured to receive. Other embodiments including additional apparatuses and methods are described.

    APPARATUSES AND METHODS TO CHANGE INFORMATION VALUES

    公开(公告)号:US20160149674A1

    公开(公告)日:2016-05-26

    申请号:US15012519

    申请日:2016-02-01

    CPC classification number: H04L1/24 H04L25/028 H04L25/0292 H04L25/4908

    Abstract: Some embodiments include apparatuses and methods having a component to change a value of a bit among a number of M bits of information when the M bits have the same value and when M exceeds a selected value. At least one of such embodiments can include a transmitting component to provide the information to a connection. At least one of such embodiments can include a receiving component to receive the information from the connection. In at least one of such embodiments, the selected value can include a maximum number of consecutive bits having the same value that such a receiving component can be configured to receive. Other embodiments including additional apparatuses and methods are described.

    COOPERATIVE MEMORY ERROR DETECTION AND REPAIR
    4.
    发明申请
    COOPERATIVE MEMORY ERROR DETECTION AND REPAIR 有权
    合作记忆错误检测和修复

    公开(公告)号:US20150355986A1

    公开(公告)日:2015-12-10

    申请号:US14832559

    申请日:2015-08-21

    Inventor: Kurt Ware

    Abstract: Some embodiments include apparatuses and methods having a memory structure included in a memory device and a control unit included in the memory device. The control unit can provide information obtained from the memory structure during a memory operation to a host device (e.g., a processor) in response to a command from the host device. If the control unit receives a notification from the host device indicating that the host device has detected an error in the information obtained from the memory structure, then a repair unit included in the memory device performs a memory repair operation to repair a portion in the memory structure.

    Abstract translation: 一些实施例包括具有包括在存储器件中的存储器结构的装置和方法以及包括在存储器件中的控制单元。 响应于来自主机设备的命令,控制单元可以在存储器操作期间从存储器结构获得的信息提供给主机设备(例如,处理器)。 如果控制单元从主机设备接收到指示主机设备已经从存储器结构获得的信息中检测到错误的通知,则存储器件中包括的修复单元执行存储器修复操作以修复存储器中的一部分 结构体。

    APPARATUSES AND METHODS TO CHANGE INFORMATION VALUES

    公开(公告)号:US20200169361A1

    公开(公告)日:2020-05-28

    申请号:US16776027

    申请日:2020-01-29

    Abstract: Some embodiments include apparatuses and methods having a component to change a value of a bit among a number of M bits of information when the M bits have the same value and when M exceeds a selected value. At least one of such embodiments can include a transmitting component to provide the information to a connection. At least one of such embodiments can include a receiving component to receive the information from the connection. In at least one of such embodiments, the selected value can include a maximum number of consecutive bits having the same value that such a receiving component can be configured to receive. Other embodiments including additional apparatuses and methods are described.

    Apparatuses and methods to change information values

    公开(公告)号:US10554349B2

    公开(公告)日:2020-02-04

    申请号:US16028133

    申请日:2018-07-05

    Abstract: Some embodiments include apparatuses and methods having a component to change a value of a bit among a number of M bits of information when the M bits have the same value and when M exceeds a selected value. At least one of such embodiments can include a transmitting component to provide the information to a connection. At least one of such embodiments can include a receiving component to receive the information from the connection. In at least one of such embodiments, the selected value can include a maximum number of consecutive bits having the same value that such a receiving component can be configured to receive. Other embodiments including additional apparatuses and methods are described.

    Cooperative memory error detection and repair
    8.
    发明授权
    Cooperative memory error detection and repair 有权
    协同内存错误检测和修复

    公开(公告)号:US09135100B2

    公开(公告)日:2015-09-15

    申请号:US13804071

    申请日:2013-03-14

    Inventor: Kurt Ware

    Abstract: Some embodiments include apparatuses and methods having a memory structure included in a memory device and a control unit included in the memory device. The control unit can provide information obtained from the memory structure during a memory operation to a host device (e.g., a processor) in response to a command from the host device. If the control unit receives a notification from the host device indicating that the host device has detected an error in the information obtained from the memory structure, then a repair unit included in the memory device performs a memory repair operation to repair a portion in the memory structure.

    Abstract translation: 一些实施例包括具有包括在存储器件中的存储器结构的装置和方法以及包括在存储器件中的控制单元。 响应于来自主机设备的命令,控制单元可以在存储器操作期间从存储器结构获得的信息提供给主机设备(例如,处理器)。 如果控制单元从主机设备接收到指示主机设备已经从存储器结构获得的信息中检测到错误的通知,则存储器件中包括的修复单元执行存储器修复操作以修复存储器中的一部分 结构体。

    Multiple-level memory cells and error detection
    9.
    发明授权
    Multiple-level memory cells and error detection 有权
    多级存储单元和错误检测

    公开(公告)号:US08756481B2

    公开(公告)日:2014-06-17

    申请号:US13757358

    申请日:2013-02-01

    Inventor: Kurt Ware

    CPC classification number: G06F11/1072 G11C7/16 G11C11/5621 G11C29/00

    Abstract: Memory, modules and methods for using error detection with multi-level memory cells where the number of storage levels of the memory cells is an integer power of a non-binary prime number are provided. Additional circuit and methods are disclosed.

    Abstract translation: 提供了使用存储器单元的存储级数为非二进制素数的整数倍的多级存储器单元进行错误检测的存储器,模块和方法。 公开了附加的电路和方法。

    MULTIPLE-LEVEL MEMORY CELLS AND ERROR DETECTION
    10.
    发明申请
    MULTIPLE-LEVEL MEMORY CELLS AND ERROR DETECTION 有权
    多级记忆细胞和错误检测

    公开(公告)号:US20130151931A1

    公开(公告)日:2013-06-13

    申请号:US13757358

    申请日:2013-02-01

    Inventor: Kurt Ware

    CPC classification number: G06F11/1072 G11C7/16 G11C11/5621 G11C29/00

    Abstract: Memory, modules and methods for using error detection with multi-level memory cells where the number of storage levels of the memory cells is an integer power of a non-binary prime number are provided. Additional circuit and methods are disclosed.

    Abstract translation: 提供了用于使用存储器单元的存储级数为非二进制素数的整数倍的多级存储器单元进行错误检测的存储器,模块和方法。 公开了附加的电路和方法。

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