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    READ ONLY MEMORY (ROM)-EMULATED MEMORY (REM) PROFILE MODE OF MEMORY DEVICE
    2.
    发明申请
    READ ONLY MEMORY (ROM)-EMULATED MEMORY (REM) PROFILE MODE OF MEMORY DEVICE 有权

    公开(公告)号：US20210193199A1

    公开(公告)日：2021-06-24

    申请号：US16946305

    申请日：2020-06-16

    Applicant: Micron Technology, Inc.

    Inventor： Jonathan Wen Jian Oh ,  Aaron James Olson ,  Fulvio Rori ,  Qisong Lin ,  Preston A. Thomson

    IPC: G11C7/10 ,  G06F9/30 ,  G06F11/27 ,  G06F12/0882

    Abstract: A programmable memory device includes a read only memory (ROM) block to store instructions associated with functionality of the programmable memory device. The device includes a memory array having a set of reserved pages to store updates to be performed on the ROM block. The device includes a controller coupled to the ROM block and the memory array. The controller is to execute the instructions to: execute a set features command; program, in execution of the set features command, a set of sub-feature parameters to a specified feature address of the set of reserved pages, wherein the set of sub-feature parameters are to trigger operation within a ROM-emulated memory (REM) profile mode; and program a REM-profiled page of the set of reserved pages with REM data received from a host system.

    MANAGING BLOCK RETIREMENT FOR TEMPORARY OPERATIONAL CONDITIONS
    9.
    发明申请
    MANAGING BLOCK RETIREMENT FOR TEMPORARY OPERATIONAL CONDITIONS 有权

    公开(公告)号：US20210118519A1

    公开(公告)日：2021-04-22

    申请号：US16660483

    申请日：2019-10-22

    Applicant: Micron Technology, Inc.

    Inventor： Kishore Kumar Muchherla ,  Sampath K. Ratnam ,  Scott A. Stoller ,  Preston A. Thomson ,  Kevin R. Brandt ,  Marc S. Hamilton ,  Christopher S. Hale

    IPC: G11C29/38 ,  G11C29/44

    Abstract: A processing device in a memory system detects a data loss occurrence in a block of a memory component. The processing device identifies a behavioral criterion associated with the data loss occurrence in the block of the memory component. The processing device further increments a counter associated with the block in response to an occurrence of the behavioral criterion, wherein a value of the counter corresponds to a number of occurrences of a plurality of behavioral criteria associated with data loss occurrences in the block. Responsive to determining that the value of the counter satisfies a first threshold criterion, the processing device designates the block as a quarantined block, performs a stress test of a plurality of stress tests of the block, and responsive to the block failing a first stress test, the processing device retires the block of the memory component.

    DATA ERASE OPERATIONS FOR A MEMORY SYSTEM
    10.
    发明申请
    DATA ERASE OPERATIONS FOR A MEMORY SYSTEM 审中-公开

    公开(公告)号：US20190371409A1

    公开(公告)日：2019-12-05

    申请号：US15994151

    申请日：2018-05-31

    Applicant: Micron Technology, Inc.

    Inventor： Kevin R. Brandt ,  Adam J. Hieb ,  Jonathan Tanguy ,  Preston A. Thomson

    IPC: G11C16/16 ,  G11C7/20 ,  G11C16/08

    Abstract: A data erase operation is performed on the memory system. The directed data erase operation performed on the memory system erases blocks of the memory device including blocks that are indicated as not including user data. In some embodiments, a data erase operation may be performed on a memory system to erase those groups of memory cells (e.g., blocks) indicated as not including user data. In some embodiments, a data erase operation may be performed on a memory system to erase those groups of memory cells (e.g., blocks) indicated as valid without erasing those groups of memory cells (e.g., blocks) indicated as invalid. In some embodiments, a data erase operation that can be performed on a memory system may obtain information associated with failing scenes of groups of memory cells (e.g., blocks) prior to obtaining the information, and erase the blocks (e.g., invalid blocks) subsequently.

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