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公开(公告)号：US12204792B2
公开(公告)日：2025-01-21
申请号：US17396117
申请日：2021-08-06
Applicant: Micron Technology, Inc.
Inventor： Reshmi Basu , David Aaron Palmer , Jonathan S. Parry
Abstract: Methods, systems, and devices for adaptive throughput monitoring are described. In some examples, a memory system may be associated with one or more clocks that are each associated with a respective subcomponent. When the memory system receives a plurality of commands, the memory system may determine a throughput of the commands. Based on the determined throughput, the memory system may adjust a rate of one or more of the clocks.
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公开(公告)号：US20240345775A1
公开(公告)日：2024-10-17
申请号：US18633028
申请日：2024-04-11
Applicant: Micron Technology, Inc.
Inventor： Giuseppe Cariello , Reshmi Basu
IPC: G06F3/06
CPC classification number: G06F3/0659 , G06F3/061 , G06F3/0679
Abstract: Methods, systems, and devices for dynamic status registers array are described. An apparatus may include one or more memory dice coupled with a data bus. The apparatus may further include a controller coupled with each of the memory dice via the data bus that is configured to transmit a first command associated with a first operation to a first memory die. The first command may assign an associated operation (e.g., the first operation) to a queue slot of a status bank that is associated with at least the first memory die. The controller may further transmit second command to the first memory die to request a status of the first operation. The controller may receive a status of the first operation via a channel (e.g., a first channel) of the data bus that is based on the assigned queue slot of the status bank.
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公开(公告)号：US12001696B2
公开(公告)日：2024-06-04
申请号：US17869941
申请日：2022-07-21
Applicant: Micron Technology, Inc.
Inventor： Reshmi Basu
CPC classification number: G06F3/0632 , G06F3/0604 , G06F3/0659 , G06F3/0673 , G06N20/00
Abstract: Systems, apparatuses, and methods related to channel architecture for memory devices are described. Various applications can access data from a memory device via a plurality of channels. The channels can be selectively enabled or disabled based on the behavior of the applications. For instance, an apparatus in the form of a memory system can include an interface coupled to a controller and a plurality of channels. The controller can be configured to determine an aggregate amount of bandwidth used by a plurality of applications accessing data from a memory device coupled to the controller via the plurality of channels and disable one or more channels of the plurality of channels based, at least in part, on the aggregate amount of bandwidth used by the plurality of applications.
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公开(公告)号：US11940874B2
公开(公告)日：2024-03-26
申请号：US17883051
申请日：2022-08-08
Applicant: Micron Technology, Inc.
Inventor： Nitul Gohain , Jonathan S. Parry , Reshmi Basu
CPC classification number: G06F11/1068 , G06F3/0619 , G06F3/0659 , G06F3/0679 , G06F11/0772
Abstract: Methods, systems, and devices for queue management for a memory system are described. The memory system may include a first decoder associated with a first error control capability and a second decoder associated with a second error control capability. The memory system may receive a command and identify an expected latency for performing an error control operation on the command. The memory system may determine whether to assign the command to a first queue associated with the first decoder or a second queue associated with the second decoder based at least in part on the expected latency for processing the command using the first decoder. Upon assigning the command to a decoder, the command may be processed by the first queue or the second queue.
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公开(公告)号：US20240037960A1
公开(公告)日：2024-02-01
申请号：US18481732
申请日：2023-10-05
Applicant: Micron Technology, Inc.
Inventor： Reshmi Basu
CPC classification number: G06V20/58 , G06V10/751 , G06F18/24 , G06V20/56 , G06V20/60
Abstract: Methods, systems, and apparatuses related to autonomous vehicle object detection are described. An autonomous vehicle can capture an image corresponding to an unknown object disposed within a sight line of the autonomous vehicle. Processing resources available to a plurality of memory devices associated with the autonomous vehicle can be reallocated in response to capturing the image and an operation involving the image corresponding to the unknown object to classify the unknown object can be performed using the reallocated processing resources.
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Patent Agency Ranking
公开(公告)号：US11783595B2
公开(公告)日：2023-10-10
申请号：US17322109
申请日：2021-05-17
Applicant: Micron Technology, Inc.
Inventor： Reshmi Basu
CPC classification number: G06V20/58 , G06F18/24 , G06V10/751 , G06V20/56 , G06V20/60
Abstract: Methods, systems, and apparatuses related to autonomous vehicle object detection are described. An autonomous vehicle can capture an image corresponding to an unknown object disposed within a sight line of the autonomous vehicle. Processing resources available to a plurality of memory devices associated with the autonomous vehicle can be reallocated in response to capturing the image and an operation involving the image corresponding to the unknown object to classify the unknown object can be performed using the reallocated processing resources.
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公开(公告)号：US20230305617A1
公开(公告)日：2023-09-28
申请号：US18096288
申请日：2023-01-12
Applicant: Micron Technology, Inc.
Inventor： Luca Porzio , Christian M. Gyllenskog , Giuseppe Cariello , Marco Onorato , Roberto IZZI , Stephen Hanna , Jonathan S. Parry , Reshmi Basu , Nadav Grosz , David Aaron Palmer
IPC: G06F1/3234 , G06F9/4401 , G06F1/324
CPC classification number: G06F1/3275 , G06F1/324 , G06F9/4411
Abstract: Methods, systems, and devices for dynamic power modes for boot-up procedures are described. A memory system may initiate a boot-up procedure according to a predefined first power mode that is associated with a first power consumption. The memory system may then determine whether to perform the boot-up procedure according to the first power mode or a second power mode associated with a different second power consumption. In cases that the memory system receives an indication of the second power mode from the host system, the memory system may perform the boot-up procedure according to the second power mode. Additionally, in cases that the memory system does not receive an indication of the second power mode from the host system, the memory system may perform the boot-up procedure according to the first power mode.
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公开(公告)号：US20230100557A1
公开(公告)日：2023-03-30
申请号：US17991287
申请日：2022-11-21
Applicant: Micron Technology, Inc.
Inventor： Reshmi Basu , Richard C. Murphy
Abstract: Systems, apparatuses, and methods related to host-based error correction are described. Error correction operations can be performed on a host computing system as opposed to on a memory system. For instance, data containing erroneous bits can be transferred from a memory system to a host computing system and error correction operations can be performed using circuitry resident on the host computing system. In an example, a method can include receiving, by a host computing system, data that comprises a plurality of uncorrected bits from a memory system coupleable to the host computing system, determining an acceptable error range for the data based at least in part on an application associated with the data, and performing, using error correction logic resident on the host computing system, an initial error correction operation on the data based at least in part on the acceptable error range.
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公开(公告)号：US20230060859A1
公开(公告)日：2023-03-02
申请号：US17462305
申请日：2021-08-31
Applicant: Micron Technology, Inc.
Inventor： Jonathan S. Parry , Jeffrey S. McNeil , Giuseppe Cariello , Kishore Kumar Muchherla , Reshmi Basu
Abstract: Methods, systems, and devices for overwriting at a memory system are described. A memory system may be configured to overwrite portions of a memory array with new data, which may be associated with omitting an erase operation. For example, write operations may be performed in accordance with a first demarcation configuration to store information at a portion of a memory array. A portion of a memory system may then determine to overwrite the portion of the memory array with different or updated information, which may include performing write operations in accordance with a second demarcation configuration. The second demarcation configuration may be associated with different cell characteristics for a one or more logic states, such as different distributions of stored charge or other cell property, different demarcation characteristics, different write operations, among other differences, which may support performing an overwrite operation without first performing an erase operation.
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公开(公告)号：US20230040336A1
公开(公告)日：2023-02-09
申请号：US17396117
申请日：2021-08-06
Applicant: Micron Technology, Inc.
Inventor： Reshmi Basu , David Aaron Palmer , Jonathan S. Parry
Abstract: Methods, systems, and devices for adaptive throughput monitoring are described. In some examples, a memory system may be associated with one or more clocks that are each associated with a respective subcomponent. When the memory system receives a plurality of commands, the memory system may determine a throughput of the commands. Based on the determined throughput, the memory system may adjust a rate of one or more of the clocks.
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