公开(公告)号：US20220147369A1

公开(公告)日：2022-05-12

申请号：US17094976

申请日：2020-11-11

Applicant: Micron Technology, Inc.

Inventor： Brenda D. Kraus ,  Yifen Liu

IPC: G06F9/4401 ,  G06F9/445 ,  G06N20/00

Abstract: Methods and apparatuses associated with rebooting a computing device are described. Examples can include receiving at a processing resource of a computing device first signaling associated with boot programs of the computing device and second signaling associated with a boot sequence of the computing device. Examples can include writing from the processing resource to a memory resource data that is based at least in part on the first and the second signaling and writing from the processing resource to the memory resource data representative of activity of the computing device. Examples can include identifying data representative of a boot process for the computing device and rebooting the computing device in a particular sequence including the monitored activity, based at least in part on the data representative of the boot process responsive to a shutdown, restart, or both, of the computing device.

公开(公告)号：US20210399006A1

公开(公告)日：2021-12-23

申请号：US16904317

申请日：2020-06-17

Applicant: Micron Technology, Inc.

Inventor： Yifen Liu ,  Tecla Ghilardi ,  George Matamis ,  Justin D. Shepherdson ,  Nancy M. Lomeli ,  Chet E. Carter ,  Erik R. Byers

IPC: H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L21/768

Abstract: A microelectronic device comprises a first set of tiers, each tier of the first set of tiers comprising alternating levels of a conductive material and an insulative material and having a first tier pitch, a second set of tiers adjacent to the first set of tiers, each tier of the second set of tiers comprising alternating levels of the conductive material and the insulative material and having a second tier pitch less than the first tier pitch, a third set of tiers adjacent to the second set of tiers, each tier of the third set of tiers comprising alternating levels of the conductive material and the insulative material and having a third tier pitch less than the second tier pitch, and a string of memory cells extending through the first set of tiers, the second set of tiers, and the third set of tiers. Related microelectronic devices, electronic systems, and methods are also described.

公开(公告)号：US11956954B2

公开(公告)日：2024-04-09

申请号：US17092916

申请日：2020-11-09

Applicant: Micron Technology, Inc.

Inventor： Yifen Liu ,  Yan Song ,  Albert Fayrushin ,  Naiming Liu ,  Yingda Dong ,  George Matamis

IPC: H10B43/27 ,  H01L23/522 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40

CPC classification number: H10B43/27 ,  H01L23/5226 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40

Abstract: An electronic device comprises a stack of alternating dielectric materials and conductive materials, a pillar region extending vertically through the stack, an oxide material within the pillar region and laterally adjacent to the dielectric materials and the conductive materials of the stack, and a storage node laterally adjacent to the oxide material and within the pillar region. A charge confinement region of the storage node is in horizontal alignment with the conductive materials of the stack. A height of the charge confinement region in a vertical direction is less than a height of a respective, laterally adjacent conductive material of the stack in the vertical direction. Related methods and systems are also disclosed.

公开(公告)号：US20220336487A1

公开(公告)日：2022-10-20

申请号：US17301915

申请日：2021-04-19

Applicant: Micron Technology, Inc.

Inventor： Yifen Liu ,  Ching-Huang Lu ,  Shuangqiang Luo

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/1157

Abstract: An electronic device comprising first blocks and second blocks of an array comprising memory cells. The memory cells in the first and second blocks comprise memory pillars extending through a stack. The memory pillars comprise a charge blocking material laterally adjacent to the stack, a storage nitride material laterally adjacent to the charge blocking material, a tunnel dielectric material laterally adjacent to the storage nitride material, a channel material laterally adjacent to the tunnel dielectric material, and a fill material between opposing sides of the channel material. One or more of the storage nitride material and the tunnel dielectric material in the first blocks differ in thickness or in material composition from one or more of the storage nitride material and the tunnel dielectric material in the second blocks. Additional electronic devices are disclosed, as are methods of forming an electronic device and related systems.

公开(公告)号：US20220198542A1

公开(公告)日：2022-06-23

申请号：US17398641

申请日：2021-08-10

Applicant: Micron Technology, Inc.

Inventor： Yifen Liu ,  Linh H. Nguyen ,  Libo Wang ,  Ariela E. Gruszka ,  Carla L. Christensen

IPC: G06Q30/06 ,  G06N20/00

Abstract: Methods and non-transitory machine-readable media associated with clothing recommendations are described. Clothing recommendations can include identifying, using a model built based on input data previously received in association with an article of clothing associated with a child, physical data associated with the child, and image data of the child with a reference object, output data representative of a clothing size recommendation for the child and sending, in response to a user request or a data refresh, the clothing size recommendation, a different article of clothing recommendation for the child based at least in part on the output data, or both, to a user device.

公开(公告)号：US20210200461A1

公开(公告)日：2021-07-01

申请号：US17079048

申请日：2020-10-23

Applicant: Micron Technology, Inc.

Inventor： Kishore Kumar Muchherla ,  Mark A. Helm ,  Giuseppina Puzzilli ,  Peter Feeley ,  Yifen Liu ,  Violante Moschiano ,  Akira Goda ,  Sampath K. Ratnam

IPC: G06F3/06

Abstract: An example memory sub-system comprises: a memory device; and a processing device, operatively coupled with the memory device. The processing device is configured to: receive a first host data item; store the first host data item in a first page of a first logical unit of a memory device, wherein the first page is associated with a fault tolerant stripe; receive a second host data item; store the second host data item in a second page of the first logical unit of the memory device, wherein the second page is associated with the fault tolerant stripe, and wherein the second page is separated from the first page by one or more wordlines including a dummy wordline storing no host data; and store, in a third page of a second logical unit of the memory device, redundancy metadata associated with the fault tolerant stripe.

公开(公告)号：US11467850B2

公开(公告)日：2022-10-11

申请号：US17094976

申请日：2020-11-11

Applicant: Micron Technology, Inc.

Inventor： Brenda D. Kraus ,  Yifen Liu

IPC: G06F9/44 ,  G06F9/4401 ,  G06N20/00 ,  G06F9/445

Abstract: Methods and apparatuses associated with rebooting a computing device are described. Examples can include receiving at a processing resource of a computing device first signaling associated with boot programs of the computing device and second signaling associated with a boot sequence of the computing device. Examples can include writing from the processing resource to a memory resource data that is based at least in part on the first and the second signaling and writing from the processing resource to the memory resource data representative of activity of the computing device. Examples can include identifying data representative of a boot process for the computing device and rebooting the computing device in a particular sequence including the monitored activity, based at least in part on the data representative of the boot process responsive to a shutdown, restart, or both, of the computing device.

公开(公告)号：US20220149068A1

公开(公告)日：2022-05-12

申请号：US17092916

申请日：2020-11-09

Applicant: Micron Technology, Inc.

Inventor： Yifen Liu ,  Yan Song ,  Albert Fayrushin ,  Naiming Liu ,  Yingda Dong ,  George Matamis

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L23/522

Abstract: An electronic device comprises a stack of alternating dielectric materials and conductive materials, a pillar region extending vertically through the stack, an oxide material within the pillar region and laterally adjacent to the dielectric materials and the conductive materials of the stack, and a storage node laterally adjacent to the oxide material and within the pillar region. A charge confinement region of the storage node is in horizontal alignment with the conductive materials of the stack. A height of the charge confinement region in a vertical direction is less than a height of a respective, laterally adjacent conductive material of the stack in the vertical direction. Related methods and systems are also disclosed.

公开(公告)号：US20240244845A1

公开(公告)日：2024-07-18

申请号：US18622671

申请日：2024-03-29

Applicant: Micron Technology, Inc.

Inventor： Yifen Liu ,  Yan Song ,  Albert Fayrushin ,  Naiming Liu ,  Yingda Dong ,  George Matamis

IPC: H10B43/27 ,  H01L23/522 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40

CPC classification number: H10B43/27 ,  H01L23/5226 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40

Abstract: An electronic device comprises a stack of alternating dielectric materials and conductive materials, a pillar region extending vertically through the stack, an oxide material within the pillar region and laterally adjacent to the dielectric materials and the conductive materials of the stack, and a storage node laterally adjacent to the oxide material and within the pillar region. A charge confinement region of the storage node is in horizontal alignment with the conductive materials of the stack. A height of the charge confinement region in a vertical direction is less than a height of a respective, laterally adjacent conductive material of the stack in the vertical direction. Related methods and systems are also disclosed.

公开(公告)号：US11789746B2

公开(公告)日：2023-10-17

申请号：US17955326

申请日：2022-09-28

Applicant: Micron Technology, Inc.

Inventor： Brenda D. Kraus ,  Yifen Liu

IPC: G06F9/44 ,  G06F9/4401 ,  G06N20/00 ,  G06F9/445

CPC classification number: G06F9/4418 ,  G06F9/4406 ,  G06F9/44505 ,  G06N20/00

Abstract: Methods and apparatuses associated with rebooting a computing device are described. Examples can include receiving at a processing resource of a computing device first signaling associated with boot programs of the computing device and second signaling associated with a boot sequence of the computing device. Examples can include writing from the processing resource to a memory resource data that is based at least in part on the first and the second signaling and writing from the processing resource to the memory resource data representative of activity of the computing device. Examples can include identifying data representative of a boot process for the computing device and rebooting the computing device in a particular sequence including the monitored activity, based at least in part on the data representative of the boot process responsive to a shutdown, restart, or both, of the computing device.