公开(公告)号：US20220027546A1

公开(公告)日：2022-01-27

申请号：US17230592

申请日：2021-04-14

Applicant: NVIDIA Corp.

Inventor： Haoxing Ren ,  Matthew Rudolph Fojtik

IPC: G06F30/398 ,  G06F30/394 ,  G06N3/12 ,  G06N3/04

Abstract: A genetic algorithm is utilized to generate routing candidates to which a reinforcement learning model is applied to correct the design rule constraint violations incrementally. A design rule checker provides feedback on the violations to the reinforcement learning model and the model learns how to fix the violations. A layout device placer based upon a simulated annealing method may also be utilized.

公开(公告)号：US11133794B1

公开(公告)日：2021-09-28

申请号：US17020556

申请日：2020-09-14

Applicant: NVIDIA Corp.

Inventor： Stephen G Tell ,  Matthew Rudolph Fojtik ,  John Poulton

IPC: H03K5/14 ,  G04F10/00

Abstract: This disclosure relates to a circuit comprising a first, second, and third data latch, and an input for a data signal. The first data latch may be configured to sample a delayed version of the data signal in response to a first control signal. The second data latch may be configured to sample the delayed version of the data signal in response to a run clock signal. The run clock signal may be configured to run for a predefined number of clock cycles subsequent to the first control signal. The third data latch may be configured to sample either an output signal of the first data latch or an output signal of the second data latch in response to a second control signal received after the predefined number of clock cycles of the run clock signal.

公开(公告)号：US12169677B2

公开(公告)日：2024-12-17

申请号：US17230592

申请日：2021-04-14

Applicant: NVIDIA Corp.

Inventor： Haoxing Ren ,  Matthew Rudolph Fojtik

IPC: G06F30/398 ,  G06F30/394 ,  G06N3/047 ,  G06N3/12

Abstract: A genetic algorithm is utilized to generate routing candidates to which a reinforcement learning model is applied to correct the design rule constraint violations incrementally. A design rule checker provides feedback on the violations to the reinforcement learning model and the model learns how to fix the violations. A layout device placer based upon a simulated annealing method may also be utilized.