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公开(公告)号：US20240030916A1
公开(公告)日：2024-01-25
申请号：US17932052
申请日：2022-09-14
Applicant: NVIDIA Corp.
Inventor： Walker Joseph Turner , John Poulton , Sanquan Song
IPC: H03K19/0185 , H03K19/00
CPC classification number: H03K19/018521 , H03K19/0013 , H03K3/356165
Abstract: A level-shifting circuits utilizing storage cells for shifting signals low-to-high or high-to-low include control drivers with moving supply voltages. The moving supply voltages may power positive or negative supply terminals of the control drivers. The control drivers drive gates of common-source configured devices coupled to storage nodes of the storage cell.
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公开(公告)号：US20240030918A1
公开(公告)日：2024-01-25
申请号：US17932091
申请日：2022-09-14
Applicant: NVIDIA Corp.
Inventor： Walker Joseph Turner , John Poulton , Sanquan Song
IPC: H03K19/0185 , H03K19/00
CPC classification number: H03K19/018521 , H03K19/0013 , H03K3/356165
Abstract: Stacked voltage domain level shifting circuits for shifting signals low-to-high or high-to-low include a storage cell powered by a mid-range supply rail of the stacked voltage domain level shifting circuit, and control drivers powered by moving supply voltages generated by the storage cell, wherein the control drivers coupled to drive gates of common-source configured devices coupled to storage nodes of the storage cell.
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公开(公告)号：US11824533B1
公开(公告)日：2023-11-21
申请号：US17814752
申请日：2022-07-25
Applicant: NVIDIA Corp.
Inventor： Walker Joseph Turner , John Poulton , Sanquan Song
IPC: H03K19/0185 , H03K3/037
CPC classification number: H03K19/018528 , H03K3/037 , H03K19/018521
Abstract: Voltage level conversion circuits include PMOS pull-down devices or NMOS pull-up devices, and inverters with outputs that determine gate voltages of these devices. The inverters are powered by moving supply voltages, for example complementary supply voltages generated from a pair of cross-coupled inverters. The cross-coupled inverters may implement a data storage latch with the moving supply voltages generated from the internal data storage nodes of the latch.
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公开(公告)号：US20230237313A1
公开(公告)日：2023-07-27
申请号：US18295145
申请日：2023-04-03
Applicant: NVIDIA Corp.
Inventor： Haoxing Ren , George Ferenc Kokai , Ting Ku , Walker Joseph Turner
IPC: G06N3/045 , G06F16/901 , G06F17/16
CPC classification number: G06N3/045 , G06F16/9024 , G06F17/16
Abstract: A graph neural network to predict net parasitics and device parameters by transforming circuit schematics into heterogeneous graphs and performing predictions on the graphs. The system may achieve an improved prediction rate and reduce simulation errors.
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公开(公告)号：US20210158127A1
公开(公告)日：2021-05-27
申请号：US16859585
申请日：2020-04-27
Applicant: NVIDIA Corp.
Inventor： Haoxing Ren , George Kokai , Ting Ku , Walker Joseph Turner
IPC: G06N3/04 , G06F17/16 , G06F16/901
Abstract: A graph neural network to predict net parasitics and device parameters by transforming circuit schematics into heterogeneous graphs and performing predictions on the graphs. The system may achieve an improved prediction rate and reduce simulation errors.
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Patent Agency Ranking
公开(公告)号：US12217151B2
公开(公告)日：2025-02-04
申请号：US18295145
申请日：2023-04-03
Applicant: NVIDIA Corp.
Inventor： Haoxing Ren , George Ferenc Kokai , Ting Ku , Walker Joseph Turner
IPC: G06F16/901 , G06F17/16 , G06F30/398 , G06N3/04 , G06N3/045 , G06N3/082
Abstract: A graph neural network to predict net parasitics and device parameters by transforming circuit schematics into heterogeneous graphs and performing predictions on the graphs. The system may achieve an improved prediction rate and reduce simulation errors.
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公开(公告)号：US12047067B2
公开(公告)日：2024-07-23
申请号：US17932091
申请日：2022-09-14
Applicant: NVIDIA Corp.
Inventor： Walker Joseph Turner , John Poulton , Sanquan Song
IPC: H03K19/0185 , H03K3/037 , H03K19/00 , H03K3/356
CPC classification number: H03K19/018521 , H03K3/037 , H03K19/0013 , H03K19/018528 , H03K3/356165
Abstract: Stacked voltage domain level shifting circuits for shifting signals low-to-high or high-to-low include a storage cell powered by a mid-range supply rail of the stacked voltage domain level shifting circuit, and control drivers powered by moving supply voltages generated by the storage cell, wherein the control drivers coupled to drive gates of common-source configured devices coupled to storage nodes of the storage cell.
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公开(公告)号：US12009816B2
公开(公告)日：2024-06-11
申请号：US17932052
申请日：2022-09-14
Applicant: NVIDIA Corp.
Inventor： Walker Joseph Turner , John Poulton , Sanquan Song
IPC: H03K19/0185 , H03K3/037 , H03K19/00 , H03K3/356
CPC classification number: H03K19/018521 , H03K3/037 , H03K19/0013 , H03K19/018528 , H03K3/356165
Abstract: A level-shifting circuits utilizing storage cells for shifting signals low-to-high or high-to-low include control drivers with moving supply voltages. The moving supply voltages may power positive or negative supply terminals of the control drivers. The control drivers drive gates of common-source configured devices coupled to storage nodes of the storage cell.
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公开(公告)号：US20240030917A1
公开(公告)日：2024-01-25
申请号：US17932075
申请日：2022-09-14
Applicant: NVIDIA Corp.
Inventor： Walker Joseph Turner , John Poulton , Sanquan Song
IPC: H03K19/0185 , H03K19/00
CPC classification number: H03K19/018521 , H03K19/0013 , H03K3/356165
Abstract: Stacked voltage domain level shifting circuits for shifting signals low-to-high or high-to-low include a storage cell and control drivers powered by a mid-range supply rail of the stacked voltage domain level shifting circuit, wherein the control drivers are coupled to drive common-source configured devices coupled to storage nodes of the storage cell.
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公开(公告)号：US11651194B2
公开(公告)日：2023-05-16
申请号：US16859585
申请日：2020-04-27
Applicant: NVIDIA Corp.
Inventor： Haoxing Ren , George Kokai , Ting Ku , Walker Joseph Turner
IPC: G06F16/901 , G06F17/16 , G06N3/045
CPC classification number: G06N3/045 , G06F16/9024 , G06F17/16
Abstract: A graph neural network to predict net parasitics and device parameters by transforming circuit schematics into heterogeneous graphs and performing predictions on the graphs. The system may achieve an improved prediction rate and reduce simulation errors.
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