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公开(公告)号：US09237005B2
公开(公告)日：2016-01-12
申请号：US14641454
申请日：2015-03-09
Applicant: PHISON ELECTRONICS CORP.
Inventor： Chih-Ming Chen , An-Chung Chen
CPC classification number: H04L7/04 , H03L7/085 , H04L7/0054 , H04L7/033 , H04L7/0331
Abstract: A clock data recovery circuit module including a clock recovery circuit, a frequency comparison circuit and a signal detecting circuit is provided. The clock recovery circuit is configured to output a data recovery stream and a data recovery clock based on an input signal and a clock signal. The frequency comparison circuit is coupled to the clock recovery circuit. The frequency comparison circuit is configured to compare a frequency difference between the data recovery clock and the clock signal to adjust the frequency of the clock signal based on a comparison result. The signal detecting circuit is coupled to the frequency comparison circuit. The signal detecting circuit is configured to receive and detect the input signal, and the signal detecting circuit determines whether to enable the frequency comparison circuit according to the detection result. Furthermore, a method for generating a data recovery clock is also provided.
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公开(公告)号：US09081659B2
公开(公告)日：2015-07-14
申请号：US13692981
申请日：2012-12-03
Applicant: PHISON ELECTRONICS CORP.
Inventor： Chih-Ming Chen , Wei-Yung Chen , Ming-Hui Tseng
CPC classification number: G06F12/0238 , G06F1/3215 , G06F1/3278 , H04B1/1615 , H04W52/0229 , Y02D10/157 , Y02D70/00
Abstract: A controlling method for connector is provided, which includes: receiving a first signal stream under a condition that a squelch detector is turned-off; determining whether the first signal stream contains a burst signal under a first operating frequency; if the first signal stream contains the burst signal, turning on the squelch detector and determining by the squelch detector under a second operating frequency whether a second signal stream is a waking signal, wherein the second signal stream is received after receiving the first signal stream and the second operating frequency is greater than the first operating frequency. The controlling method further includes: if the second signal stream is the waking signal, changing an operating state of the connector to an active state. In this way, the power consumption of the connector is reduced.
Abstract translation: 提供了一种用于连接器的控制方法，包括：在静噪检测器关闭的条件下接收第一信号流; 确定所述第一信号流是否包含在第一工作频率下的突发信号; 如果第一信号流包含突发信号，则打开静噪检测器并且在第二工作频率下由静噪检测器确定第二信号流是否是唤醒信号，其中在接收到第一信号流之后接收第二信号流，以及 第二工作频率大于第一工作频率。 控制方法还包括：如果第二信号流是唤醒信号，则将连接器的操作状态改变为活动状态。 以这种方式，连接器的功耗降低。
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公开(公告)号：US08897093B2
公开(公告)日：2014-11-25
申请号：US13787773
申请日：2013-03-06
Applicant: Phison Electronics Corp.
Inventor： Chih-Ming Chen , Ming-Hui Tseng
CPC classification number: G11C5/148 , G11C5/066 , G11C7/10 , G11C7/22 , G11C7/222 , G11C11/4076 , G11C29/023 , G11C29/028
Abstract: A controlling method of a connector, the connector, and a memory storage device are provided. The controlling method includes following steps. A first clock signal generated by a first oscillator in the connector is obtained. A second clock signal generated by a second oscillator in the connector is obtained. A frequency shift of the first oscillator is smaller than a frequency shift of the second oscillator. A detection window information corresponding to the second clock signal is corrected according to the first clock signal and the second clock signal. The first oscillator is turned off. A signal stream including a first signal is received. A detection window is generated according to the corrected detection window information and the second clock signal, and whether the first signal is a burst signal is determined according to the detection window. Thereby, the power consumption of the connector is reduced.
Abstract translation: 提供一种连接器，连接器和存储器存储装置的控制方法。 控制方法包括以下步骤。 获得由连接器中的第一振荡器产生的第一时钟信号。 获得由连接器中的第二振荡器产生的第二时钟信号。 第一振荡器的频移小于第二振荡器的频移。 根据第一时钟信号和第二时钟信号来校正对应于第二时钟信号的检测窗口信息。 第一个振荡器关闭。 接收包括第一信号的信号流。 根据校正的检测窗口信息和第二时钟信号产生检测窗口，并根据检测窗口确定第一信号是否是突发信号。 因此，连接器的功耗降低。
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公开(公告)号：US09893912B1
公开(公告)日：2018-02-13
申请号：US15493139
申请日：2017-04-21
Applicant: PHISON ELECTRONICS CORP.
Inventor： Wei-Ting Wei , Wei-Yung Chen , Chao-Hsin Lin , Chih-Ming Chen
CPC classification number: H04L27/2614 , H04L25/03019 , H04L27/01
Abstract: An exemplary embodiment provides an equalizer adjustment method. The method includes: performing a handshake operation to establish a connection with a host system by a memory storage device; in the handshake operation, receiving a first signal from the host system and performing a first modulation on the first signal by the adaptive equalizer; after the handshake operation is ended, receiving a second signal from the host system and performing a second modulation on the second signal according to a modulation result of the first modulation by the adaptive equalizer to compensate the second signal; and adjusting the adaptive equalizer according to a modulation result of the second modulation.
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5.发明授权Reference frequency setting method, memory controller and memory storage apparatus 有权参考频率设定方法，存储器控制器和存储器存储装置公开(公告)号：US09058863B2
公开(公告)日：2015-06-16
申请号：US13871001
申请日：2013-04-26
Applicant: PHISON ELECTRONICS CORP.
Inventor： Chih-Ming Chen , An-Chung Chen
CPC classification number: G11C7/222 , G06F13/1689 , G11C29/023 , G11C29/028 , G11C2207/2254
Abstract: A reference frequency setting method of a memory storage apparatus including the following steps is provided. A setting code is read from a memory module or a storage unit by a first signal transmission path and stored into a register circuit. The setting code includes a first setting information. Whether the data having a specific frequency is inputted is detected. If not, the setting code stored in the register circuit is read, such that an oscillator circuit module of the memory storage apparatus generates a first reference frequency based on the first setting information. If yes, the setting code stored in the register circuit is updated by a second signal transmission path, and the updated setting code is read, such that the oscillator circuit module generates a second reference frequency based on a second setting information. The updated setting code includes the second setting information.
Abstract translation: 提供了包括以下步骤的存储器存储装置的参考频率设置方法。 通过第一信号传输路径从存储器模块或存储单元读取设置码并存储到寄存器电路中。 设定代码包括第一设定信息。 检测输入了特定频率的数据。 如果不是，则读取存储在寄存器电路中的设置代码，使得存储器存储设备的振荡器电路模块基于第一设置信息生成第一参考频率。 如果是，则通过第二信号传输路径更新存储在寄存器电路中的设置代码，并且读取更新的设置代码，使得振荡器电路模块基于第二设置信息生成第二参考频率。 更新后的设定代码包括第二设定信息。
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Patent Agency Ranking
公开(公告)号：US20190116069A1
公开(公告)日：2019-04-18
申请号：US15836903
申请日：2017-12-10
Applicant: PHISON ELECTRONICS CORP.
Inventor： Sheng-Wen Chen , Shin-Yang Sun , Wei-Yung Chen , Jen-Chu Wu , Chih-Ming Chen
IPC: H04L25/03 , G06F3/06 , H04L7/00 , H04L25/497
Abstract: An equalizer tuning method for a memory storage device is provided according to an exemplary embodiment of the disclosure. The method includes: receiving a first signal; modulating the first signal by a first modulation circuit according to a first type parameter and modulating the first signal by a second modulation circuit according to a second type parameter; detecting a signal eye-width value and a signal eye-height value of the modulated first signal; and adjusting the first type parameter according to the detected signal eye-width value and adjusting the second type parameter according to the detected signal eye-height value.
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公开(公告)号：US09059789B2
公开(公告)日：2015-06-16
申请号：US13863386
申请日：2013-04-16
Applicant: PHISON ELECTRONICS CORP.
Inventor： An-Chung Chen , Chih-Ming Chen
CPC classification number: H04B1/715 , H04L27/0014 , H04L2027/0024 , H04L2027/0053
Abstract: A signal processing method, a connector and a memory storage device are provided. The signal processing method is for the connector which does not include a crystal oscillator. The signal processing method includes: receiving a first signal stream from a host system; tracking a transmission frequency of the first signal stream, and obtaining a frequency shift quantity of the first signal stream relative to the transmission frequency; determining if a spread spectrum operation is performed on the first signal stream according to the frequency shift quantity to generate a determination result; generating a second signal stream according to the determination result and the transmission frequency. Accordingly, the spread spectrum operation is handled under the situation without a crystal oscillator.
Abstract translation: 提供信号处理方法，连接器和存储器存储装置。 信号处理方法是用于不包括晶体振荡器的连接器。 信号处理方法包括：从主机系统接收第一信号流; 跟踪第一信号流的传输频率，以及获得第一信号流相对于传输频率的频移量; 根据所述频移量确定是否对所述第一信号流执行扩频操作以产生确定结果; 根据确定结果和传输频率产生第二信号流。 因此，在没有晶体振荡器的情况下处理扩频操作。
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8.发明授权Clock data recovery circuit module and method for generating data recovery clock 有权时钟数据恢复电路模块和方法，用于产生数据恢复时钟公开(公告)号：US09020086B2
公开(公告)日：2015-04-28
申请号：US13851963
申请日：2013-03-28
Applicant: Phison Electronics Corp.
Inventor： Chih-Ming Chen , An-Chung Chen
CPC classification number: H04L7/04 , H03L7/085 , H04L7/0054 , H04L7/033 , H04L7/0331
Abstract: A clock data recovery circuit module including a clock recovery circuit, a frequency comparison circuit and a signal detecting circuit is provided. The clock recovery circuit is configured to output a data recovery stream and a data recovery clock based on an input signal and a clock signal. The frequency comparison circuit is coupled to the clock recovery circuit. The frequency comparison circuit is configured to compare a frequency difference between the data recovery clock and the clock signal to adjust the frequency of the clock signal based on a comparison result. The signal detecting circuit is coupled to the frequency comparison circuit. The signal detecting circuit is configured to receive and detect the input signal, and the signal detecting circuit determines whether to enable the frequency comparison circuit according to the detection result. Furthermore, a method for generating a data recovery clock is also provided.
Abstract translation: 提供了包括时钟恢复电路，频率比较电路和信号检测电路的时钟数据恢复电路模块。 时钟恢复电路被配置为基于输入信号和时钟信号输出数据恢复流和数据恢复时钟。 频率比较电路耦合到时钟恢复电路。 频率比较电路被配置为比较数据恢复时钟和时钟信号之间的频率差，以基于比较结果来调整时钟信号的频率。 信号检测电路耦合到频率比较电路。 信号检测电路被配置为接收和检测输入信号，并且信号检测电路根据检测结果确定是否使能频率比较电路。 此外，还提供了一种用于产生数据恢复时钟的方法。
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公开(公告)号：US20140192608A1
公开(公告)日：2014-07-10
申请号：US13787773
申请日：2013-03-06
Applicant: PHISON ELECTRONICS CORP.
Inventor： Chih-Ming Chen , Ming-Hui Tseng
IPC: G11C5/14
CPC classification number: G11C5/148 , G11C5/066 , G11C7/10 , G11C7/22 , G11C7/222 , G11C11/4076 , G11C29/023 , G11C29/028
Abstract: A controlling method of a connector, the connector, and a memory storage device are provided. The controlling method includes following steps. A first clock signal generated by a first oscillator in the connector is obtained. A second clock signal generated by a second oscillator in the connector is obtained. A frequency shift of the first oscillator is smaller than a frequency shift of the second oscillator. A detection window information corresponding to the second clock signal is corrected according to the first clock signal and the second clock signal. The first oscillator is turned off. A signal stream including a first signal is received. A detection window is generated according to the corrected detection window information and the second clock signal, and whether the first signal is a burst signal is determined according to the detection window. Thereby, the power consumption of the connector is reduced.
Abstract translation: 提供一种连接器，连接器和存储器存储装置的控制方法。 控制方法包括以下步骤。 获得由连接器中的第一振荡器产生的第一时钟信号。 获得由连接器中的第二振荡器产生的第二时钟信号。 第一振荡器的频移小于第二振荡器的频移。 根据第一时钟信号和第二时钟信号来校正对应于第二时钟信号的检测窗口信息。 第一个振荡器关闭。 接收包括第一信号的信号流。 根据校正的检测窗口信息和第二时钟信号产生检测窗口，并根据检测窗口确定第一信号是否是突发信号。 因此，连接器的功耗降低。
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公开(公告)号：US20140101367A1
公开(公告)日：2014-04-10
申请号：US13692981
申请日：2012-12-03
Applicant: PHISON ELECTRONICS CORP.
Inventor： Chih-Ming Chen , Wei-Yung Chen , Ming-Hui Tseng
CPC classification number: G06F12/0238 , G06F1/3215 , G06F1/3278 , H04B1/1615 , H04W52/0229 , Y02D10/157 , Y02D70/00
Abstract: A controlling method for connector is provided, which includes: receiving a first signal stream under a condition that a squelch detector is turned-off; determining whether the first signal stream contains a burst signal under a first operating frequency; if the first signal stream contains the burst signal, turning on the squelch detector and determining by the squelch detector under a second operating frequency whether a second signal stream is a waking signal, wherein the second signal stream is received after receiving the first signal stream and the second operating frequency is greater than the first operating frequency. The controlling method further includes: if the second signal stream is the waking signal, changing an operating state of the connector to an active state. In this way, the power consumption of the connector is reduced.
Abstract translation: 提供了一种用于连接器的控制方法，包括：在静噪检测器关闭的条件下接收第一信号流; 确定所述第一信号流是否包含在第一工作频率下的突发信号; 如果第一信号流包含突发信号，则打开静噪检测器并且在第二工作频率下由静噪检测器确定第二信号流是否是唤醒信号，其中在接收到第一信号流之后接收第二信号流，以及 第二工作频率大于第一工作频率。 控制方法还包括：如果第二信号流是唤醒信号，则将连接器的操作状态改变为活动状态。 以这种方式，连接器的功耗降低。
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