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    METHOD OF RECORDING MAPPING INFORMATION, AND MEMORY CONTROLLER AND MEMORY STORAGE APPARATUS USING THE SAME
    2.
    发明申请
    METHOD OF RECORDING MAPPING INFORMATION, AND MEMORY CONTROLLER AND MEMORY STORAGE APPARATUS USING THE SAME 有权
    记录映像信息的方法，记忆控制器和使用其的存储器存储装置

    公开(公告)号：US20140289451A1

    公开(公告)日：2014-09-25

    申请号：US13896328

    申请日：2013-05-17

    Applicant: Phison Electronics Corp.

    Inventor： Kuo-Hwa Ho ,  Kheng-Chong Tan

    IPC: G06F12/02

    CPC classification number: G06F12/0246 ,  G06F2212/7201

    Abstract: A method of recording mapping information for a rewritable non-volatile memory module is provided. The method includes configuring a plurality of logical addresses, establishing at least one logical address mapping table, and storing the at least one logical address mapping table into the rewritable non-volatile memory module. The method also includes receiving data to be stored into a plurality of continuous logical addresses from a host system, writing the data into a plurality of physical programming units, updating mapping relations between the continuous logical addresses and the physical programming units in a corresponding logical address mapping table loaded to a buffer memory, storing a continuous mapping table in the buffer memory, and recording a continuous mapping record corresponding to the continuous logical addresses in the continuous mapping table.

    Abstract translation: 提供了一种用于记录可重写非易失性存储器模块的映射信息的方法。 该方法包括配置多个逻辑地址，建立至少一个逻辑地址映射表，以及将至少一个逻辑地址映射表存储到可重写非易失性存储器模块中。 该方法还包括从主机系统接收要存储到多个连续逻辑地址中的数据，将数据写入多个物理编程单元中，在对应的逻辑地址中更新连续逻辑地址与物理编程单元之间的映射关系 映射表加载到缓冲存储器中，将连续映射表存储在缓冲存储器中，并且在连续映射表中记录与连续逻辑地址相对应的连续映射记录。

    Writing method, memory controller and memory storage device
    3.
    发明授权
    Writing method, memory controller and memory storage device 有权

    公开(公告)号：US09652378B2

    公开(公告)日：2017-05-16

    申请号：US13950284

    申请日：2013-07-25

    Applicant: PHISON ELECTRONICS CORP.

    Inventor： Kuo-Hwa Ho ,  Kheng-Chong Tan

    IPC: G06F13/12 ,  G06F13/38 ,  G06F12/02

    CPC classification number: G06F12/0246 ,  G06F2212/1016 ,  G06F2212/7201 ,  G06F2212/7202 ,  G06F2212/7208

    Abstract: A writing method, a memory controller and a memory storage device are provided. The writing method includes steps of: configuring logical addresses to map to part of physical programming units in a storage area, wherein at least one of the physical programming units stores a valid data; transmitting a first write command for writing data having a first data length to at least one of the physical programming units; receiving a status signal; and selecting a spare physical erasing unit and copying the valid data having a second data length to the spare physical erasing unit, after transmitting the first write command and before receiving the status signal, wherein the first data length is not greater than the second data length. Therefore, it prevents a host system from waiting too long when writing data.

    WRITING METHOD, MEMORY CONTROLLER AND MEMORY STORAGE DEVICE
    4.
    发明申请
    WRITING METHOD, MEMORY CONTROLLER AND MEMORY STORAGE DEVICE 有权
    写入方法，存储器控制器和存储器存储器件

    公开(公告)号：US20140325119A1

    公开(公告)日：2014-10-30

    申请号：US13950284

    申请日：2013-07-25

    Applicant: PHISON ELECTRONICS CORP.

    Inventor： Kuo-Hwa Ho ,  Kheng-Chong Tan

    IPC: G06F12/02

    CPC classification number: G06F12/0246 ,  G06F2212/1016 ,  G06F2212/7201 ,  G06F2212/7202 ,  G06F2212/7208

    Abstract: A writing method, a memory controller and a memory storage device are provided. The writing method includes steps of: configuring logical addresses to map to part of physical programming units in a storage area, wherein at least one of the physical programming units stores a valid data; transmitting a first write command for writing data having a first data length to at least one of the physical programming units; receiving a status signal; and selecting a spare physical erasing unit and copying the valid data having a second data length to the spare physical erasing unit, after transmitting the first write command and before receiving the status signal, wherein the first data length is not greater than the second data length. Therefore, it prevents a host system from waiting too long when writing data.

    Abstract translation: 提供了写入方法，存储器控制器和存储器存储装置。 写入方法包括以下步骤：配置逻辑地址以映射到存储区域中的物理编程单元的一部分，其中物理编程单元中的至少一个存储有效数据; 向所述物理编程单元中的至少一个发送用于将具有第一数据长度的数据写入的第一写命令; 接收状态信号; 以及在发送所述第一写入命令之后并且在接收到所述状态信号之前，选择备用物理擦除单元并将具有第二数据长度的有效数据复制到所述备用物理擦除单元，其中所述第一数据长度不大于所述第二数据长度 。 因此，它防止主机系统在写入数据时等待太久。

    COMMAND TRANSMITTING METHOD, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE DEVICE
    7.
    发明申请
    COMMAND TRANSMITTING METHOD, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE DEVICE 有权

    公开(公告)号：US20210064283A1

    公开(公告)日：2021-03-04

    申请号：US16587044

    申请日：2019-09-29

    Applicant: PHISON ELECTRONICS CORP.

    Inventor： Kuo-Hwa Ho ,  Chih-Ming Chen

    IPC: G06F3/06

    Abstract: A command transmitting method, a memory control circuit unit and a memory storage device are provided. The method includes: transmitting a plurality of command sequences and a state read command sequence to a memory interface coupled to a rewritable non-volatile memory module; and storing the plurality of command sequences by the memory interface, and transmitting the state read command sequence to the rewritable non-volatile memory module.

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