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公开(公告)号：US11080155B2
公开(公告)日：2021-08-03
申请号：US16175295
申请日：2018-10-30
Applicant: Pure Storage, Inc.
Inventor： Hari Kannan , Randy Zhao
Abstract: A method for diagnosing memory, performed by a storage system, is provided. The method includes writing and reading through a communication channel to and from flash memory of each of a plurality of flash memory devices and a static random-access memory (SRAM) register of each of the plurality of flash memory devices. The method includes analyzing errors in read data from the reading through the communication channel, identifying types of errors among flash memory errors, SRAM register errors, and communication channel errors, based on the analyzing, and indicating at least one error and type of error from the read data.
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Patent Agency Ranking
公开(公告)号：US11449232B1
公开(公告)日：2022-09-20
申请号：US15336618
申请日：2016-10-27
Applicant: Pure Storage, Inc.
Inventor： Hari Kannan , Nenad Miladinovic , Randy Zhao
Abstract: A scheduling system for a memory controller is provided. The system includes a scheduler configurable to receive a plurality of operation requests from a plurality of masters. The scheduler is configurable to form a sequence of one or more phases from each of the operation requests. The scheduler is configurable to arbitrate the plurality of operation requests and the one or more phases through one or more configurable policies. The system includes a sequencer configurable to receive the one or more phases and communicate with at least two flash memory devices having differing types of flash memory device interfaces through a plurality of channels.
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公开(公告)号：US10216420B1
公开(公告)日：2019-02-26
申请号：US15338052
申请日：2016-10-28
Applicant: Pure Storage, Inc.
Inventor： Hari Kannan , Nenad Miladinovic , Zhangxi Tan , Randy Zhao
Abstract: A method for communicating with memory, performed by a memory controller, is provided. The method includes sampling reads from a plurality of memory devices and storing first calibration points in first buffers, based on the sampling, with at least one first calibration point and corresponding first buffer for each of the plurality of memory devices. The method includes sampling a read from a second memory device in background while performing a read from a first memory device using the first calibration point in the first buffer corresponding to the first memory device. The method includes storing a second calibration point in a second buffer, for the second memory device, based on the sampling in the background, with the first buffer for the second memory device having the first calibration point used for ongoing reads of the second memory device.
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公开(公告)号：US20240143207A1
公开(公告)日：2024-05-02
申请号：US17977934
申请日：2022-10-31
Applicant: Pure Storage, Inc.
Inventor： Sankara Vaideeswaran , Svitlana Tumanova , Ying Gao , Randy Zhao , Yuxuan Su
IPC: G06F3/06
CPC classification number: G06F3/064 , G06F3/0619 , G06F3/0656 , G06F3/0688
Abstract: A storage system is provided. The storage system includes a plurality of non-volatile memory modules a storage controller operatively coupled to the plurality of non-volatile memory modules, the storage controller comprising a processor. The process is to receive a set of data blocks to be stored in the plurality of non-volatile memory modules. The processor is further to program the set of data blocks at a first location of the plurality of non-volatile memory modules. The processor is further to determine whether a failure occurred while programming the set of data blocks in the plurality of non-volatile memory modules. The processor is further to reprogram a subset of the data blocks at a second location of the plurality of non-volatile memory modules, a number of blocks in the subset of data blocks based on durabilities of the set of data blocks, in response to determining that a failure occurred while programming the set of data blocks at the first location.
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公开(公告)号：US20190129818A1
公开(公告)日：2019-05-02
申请号：US16175295
申请日：2018-10-30
Applicant: Pure Storage, Inc.
Inventor： Hari Kannan , Randy Zhao
Abstract: A method for diagnosing memory, performed by a storage system, is provided. The method includes writing and reading through a communication channel to and from flash memory of each of a plurality of flash memory devices and a static random-access memory (SRAM) register of each of the plurality of flash memory devices. The method includes analyzing errors in read data from the reading through the communication channel, identifying types of errors among flash memory errors, SRAM register errors, and communication channel errors, based on the analyzing, and indicating at least one error and type of error from the read data.
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公开(公告)号：US09971537B1
公开(公告)日：2018-05-15
申请号：US15335135
申请日：2016-10-26
Applicant: Pure Storage, Inc.
Inventor： Hari Kannan , Robert Lee , Randy Zhao
IPC: G06F3/06
CPC classification number: G06F3/0634 , G06F3/061 , G06F3/0635 , G06F3/064 , G06F3/0653 , G06F3/0688
Abstract: A method for tracking and transitioning flash memory modes, performed by a storage system, is provided. The method includes tracking memory modes of a plurality of portions of flash memory, on a per portion basis, in a data structure in a first memory and determining, based on the data structure, whether the tracked memory mode of a portion of flash memory matches a memory mode for an I/O (input/output) command relating to the flash memory. The method includes sending at least one command to the flash memory to change the memory mode of the portion of flash memory, responsive to determining the tracked memory mode does not match the memory mode for the I/O command, and performing the I/O command with the memory mode of the portion of flash memory changed to match the memory mode for the I/O command.
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