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公开(公告)号:US11681640B2
公开(公告)日:2023-06-20
申请号:US17512032
申请日:2021-10-27
Applicant: PURE STORAGE, INC.
Inventor: Roland Dreier , Yan Liu , Sandeep Mann
CPC classification number: G06F13/28 , G06F12/023 , G06F2212/254
Abstract: Enabling multi-channel communications between controllers in a storage array, including: creating a plurality of logical communications channels between two or more storage array controllers; inserting, into a buffer utilized by a direct memory access (‘DMA’) engine of a first storage array controller, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of a second storage array controller; retrieving, in dependence upon the data transfer descriptor, the data stored in memory of the first storage array controller; and writing, via a predetermined logical communications channel, the data into the memory of the second storage array controller in dependence upon the data transfer descriptor.
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公开(公告)号:US09910800B1
公开(公告)日:2018-03-06
申请号:US15697802
申请日:2017-09-07
Applicant: Pure Storage, Inc.
Inventor: Roland Dreier , Yan Liu , Sandeep Mann
CPC classification number: G06F13/28 , G06F12/023 , G06F2212/254
Abstract: Emulating a remote direct memory access (‘RDMA’) link between controllers in a storage array, including: inserting, into a buffer utilized by a direct memory access (‘DMA’) engine of a first storage array controller, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of the second storage array controller; retrieving, in dependence upon the data transfer descriptor, the data stored in memory of the first storage array controller; and writing the data into the memory of the second storage array controller in dependence upon the data transfer descriptor.
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公开(公告)号:US09892071B2
公开(公告)日:2018-02-13
申请号:US14817168
申请日:2015-08-03
Applicant: Pure Storage, Inc.
Inventor: Roland Dreier , Yan Liu , Sandeep Mann
CPC classification number: G06F13/28 , G06F12/023 , G06F2212/254
Abstract: Emulating a remote direct memory access (‘RDMA’) link between controllers in a storage array, including: inserting, into a buffer utilized by a direct memory access (‘DMA’) engine of a first storage array controller, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of the second storage array controller; retrieving, in dependence upon the data transfer descriptor, the data stored in memory of the first storage array controller; and writing the data into the memory of the second storage array controller in dependence upon the data transfer descriptor.
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公开(公告)号:US10678432B1
公开(公告)日:2020-06-09
申请号:US15416990
申请日:2017-01-26
Applicant: PURE STORAGE, INC.
Inventor: Roland Dreier , Bryan Freed , Logan Jennings , Sandeep Mann
Abstract: A storage controller coupled to a storage array includes a device driver running in a kernel space that receives an administrative command from an application running in a user space of the storage controller and writes the administrative command to a first submission queue of a plurality of submission queues associated with a storage device in the storage array, where the first submission queue is reserved for use by the device driver. An input/output (I/O) command received from the application running in the user space, however, is written directly to a second submission queue of the plurality of submission queues without being routed through the kernel space, where the second submission queue being reserved for direct access by the application running in the user space.
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公开(公告)号:US10540307B1
公开(公告)日:2020-01-21
申请号:US15912051
申请日:2018-03-05
Applicant: Pure Storage, Inc.
Inventor: Roland Dreier , Yan Liu , Sandeep Mann
Abstract: Emulating a remote direct memory access (‘RDMA’) link between controllers in a storage array, including: inserting, into a buffer utilized by a direct memory access (‘DMA’) engine of a first storage array controller, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of the second storage array controller; retrieving, in dependence upon the data transfer descriptor, the data stored in memory of the first storage array controller; and writing the data into the memory of the second storage array controller in dependence upon the data transfer descriptor.
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