Circuits and methods for biasing a power amplifier
    2.
    发明授权
    Circuits and methods for biasing a power amplifier 有权
    用于偏置功率放大器的电路和方法

    公开(公告)号:US09419561B2

    公开(公告)日:2016-08-16

    申请号:US14248971

    申请日:2014-04-09

    Abstract: The present disclosure includes circuits and methods for power amplifiers. In one embodiment, a main amplifier stage and peaking amplifier stage of a power amplifier receive a modulated supply voltage. The peaking amplifier stage is biased dynamically to adjust the bias of peaking stage to compensate for changes in the power supply voltage. A bias voltage may be increased as the supply voltage on the peaking stage decreases, and the bias voltage may be decreased as the supply voltage on the peaking stage increases. Accordingly, bias characteristics of the peaking stage are maintained across supply voltage variations, and the efficiency of the power amplifier is improved.

    Abstract translation: 本公开包括用于功率放大器的电路和方法。 在一个实施例中,功率放大器的主放大器级和峰化放大器级接收调制电源电压。 峰值放大器级被动态偏置以调整峰值级的偏置,以补偿电源电压的变化。 随着峰值级上的电源电压降低,偏置电压可能会增加,并且偏置电压可能随着峰值级的电源电压而降低。 因此,跨电源电压变化保持峰化阶段的偏置特性,并提高功率放大器的效率。

    BIAS CIRCUITS AND METHODS FOR STACKED DEVICES
    3.
    发明申请
    BIAS CIRCUITS AND METHODS FOR STACKED DEVICES 有权
    用于堆叠设备的偏置电路和方法

    公开(公告)号:US20150244322A1

    公开(公告)日:2015-08-27

    申请号:US14298665

    申请日:2014-06-06

    Abstract: Embodiments of the present disclosure include a bias circuit for generating bias voltages to stacked transistors. In one embodiment, stacked transistors are coupled between an input transistor and an output node. A modulated power supply voltage and an input signal produce a voltage at the output node. The modulated power supply voltage is provided as an input to the bias circuit. Bias voltages are generated that change with the power supply voltage. In one embodiment, particular transistors in the stack are biased so that their control terminals are effectively short circuited when the power supply voltage is reduced.

    Abstract translation: 本公开的实施例包括用于向堆叠晶体管产生偏置电压的偏置电路。 在一个实施例中,堆叠晶体管耦合在输入晶体管和输出节点之间。 调制电源电压和输入信号在输出节点产生电压。 调制电源电压被提供给偏置电路的输入。 产生随着电源电压而变化的偏压。 在一个实施例中,堆叠中的特定晶体管被偏置,使得当电源电压降低时,它们的控制端子有效地短路。

    ANALOG INTERFERENCE CANCELLATION USING DIGITAL COMPUTATION OF CANCELLATION COEFFICIENTS
    4.
    发明申请
    ANALOG INTERFERENCE CANCELLATION USING DIGITAL COMPUTATION OF CANCELLATION COEFFICIENTS 审中-公开
    使用数字化计算取消系统的模拟干扰消除

    公开(公告)号:US20170041039A1

    公开(公告)日:2017-02-09

    申请号:US14819197

    申请日:2015-08-05

    CPC classification number: H04B1/48 H04B1/525 H04B2001/485

    Abstract: Various aspects described herein relate to providing analog interference cancellation using digitally computed coefficients. An aggressor signal can be obtained from a transmitter chain of a radio frequency (RF) front end. A digital representation of the aggressor signal can be generated, and cancellation coefficients can be estimated for the digital representation of the aggressor signal. An analog cancellation signal can be generated based at least in part the cancellation coefficients and the digital representation of the aggressor signal. The analog cancellation signal can be added to a victim signal in a receiver chain of the RF front end to cancel interference to the victim signal from the aggressor signal.

    Abstract translation: 本文描述的各个方面涉及使用数字计算的系数来提供模拟干扰消除。 可以从射频(RF)前端的发射机链获得攻击者信号。 可以产生攻击者信号的数字表示,并且可以为攻击者信号的数字表示估计抵消系数。 可以至少部分地基于抵消系数和侵略者信号的数字表示来生成模拟消除信号。 模拟消除信号可以添加到RF前端的接收机链中的受害者信号,以消除来自侵扰者信号对受害者信号的干扰。

    TRI-PHASE DIGITAL POLAR MODULATOR
    5.
    发明申请
    TRI-PHASE DIGITAL POLAR MODULATOR 有权
    三相数位极性调制器

    公开(公告)号:US20150229272A1

    公开(公告)日:2015-08-13

    申请号:US14175111

    申请日:2014-02-07

    CPC classification number: H03C7/025 H04L27/22 H04L27/361

    Abstract: Exemplary embodiments are related to a tri-phase digital polar modulator. A device may include a modulator configured to generate a primary phase modulated signal including the most significant bits (MSBs) of a modulated signal, a leading phase modulated signal including a first least significant bits (LSB) of the modulated signal, and a lagging phase modulated signal including a second LSB of the modulated signal. The device may also include a combination unit configured to add the primary phase modulated signal, the leading phase modulated signal, and the lagging phase modulated signal

    Abstract translation: 示例性实施例涉及三相数字极化调制器。 设备可以包括调制器,其被配置为生成包括调制信号的最高有效位(MSB)的主相位调制信号,包括调制信号的第一最低有效位(LSB)的前置相位调制信号和滞后相位 调制信号包括调制信号的第二LSB。 该装置还可以包括组合单元,其被配置为将主相位调制信号,前置相位调制信号和滞后相位调制信号

    SELF-INTERFERENCE CANCELLATION USING DIGITAL FILTER AND AUXILIARY RECEIVER
    6.
    发明申请
    SELF-INTERFERENCE CANCELLATION USING DIGITAL FILTER AND AUXILIARY RECEIVER 审中-公开
    使用数字滤波器和辅助接收机的自干扰消除

    公开(公告)号:US20160294425A1

    公开(公告)日:2016-10-06

    申请号:US14679937

    申请日:2015-04-06

    CPC classification number: H04B1/123 H04B1/1027 H04B1/40 H04B1/525 H04B17/29

    Abstract: Aspects of the disclosure are directed to interference cancellation. A method of performing interference cancellation in a wireless device having a transmitter and a receiver includes enabling a radio frequency (RF) receive filter for a victim band from a plurality of RF receive filters in a receive path; measuring an RF filter characteristic of the enabled RF receive filter with an auxiliary receiver; configuring a programmable digital filter to match a filter characteristic to the measured RF filter characteristic to yield a reference signal; and providing the reference signal to the receive path for interference cancellation; and, the reference signal is subtracted from a receive signal in the receive path.

    Abstract translation: 本公开的方面涉及干扰消除。 在具有发射机和接收机的无线设备中执行干扰消除的方法包括:在接收路径中对来自多个RF接收滤波器的受害频带进行射频(RF)接收滤波器; 使用辅助接收器测量使能的RF接收滤波器的RF滤波器特性; 配置可编程数字滤波器以将滤波器特性与测量的RF滤波器特性相匹配以产生参考信号; 以及将所述参考信号提供给所述接收路径用于干扰消除; 并且从接收路径中的接收信号中减去参考信号。

    Bias circuits and methods for stacked devices
    7.
    发明授权
    Bias circuits and methods for stacked devices 有权
    偏置电路和堆叠器件的方法

    公开(公告)号:US09252713B2

    公开(公告)日:2016-02-02

    申请号:US14298665

    申请日:2014-06-06

    Abstract: Embodiments of the present disclosure include a bias circuit for generating bias voltages to stacked transistors. In one embodiment, stacked transistors are coupled between an input transistor and an output node. A modulated power supply voltage and an input signal produce a voltage at the output node. The modulated power supply voltage is provided as an input to the bias circuit. Bias voltages are generated that change with the power supply voltage. In one embodiment, particular transistors in the stack are biased so that their control terminals are effectively short circuited when the power supply voltage is reduced.

    Abstract translation: 本公开的实施例包括用于向堆叠晶体管产生偏置电压的偏置电路。 在一个实施例中,堆叠晶体管耦合在输入晶体管和输出节点之间。 调制电源电压和输入信号在输出节点产生电压。 调制电源电压被提供给偏置电路的输入。 产生随着电源电压而变化的偏压。 在一个实施例中,堆叠中的特定晶体管被偏置,使得当电源电压降低时,它们的控制端子有效地短路。

    CIRCUITS AND METHODS FOR BIASING A POWER AMPLIFIER
    8.
    发明申请
    CIRCUITS AND METHODS FOR BIASING A POWER AMPLIFIER 有权
    用于放大功率放大器的电路和方法

    公开(公告)号:US20150295541A1

    公开(公告)日:2015-10-15

    申请号:US14248971

    申请日:2014-04-09

    Abstract: The present disclosure includes circuits and methods for power amplifiers. In one embodiment, a main amplifier stage and peaking amplifier stage of a power amplifier receive a modulated supply voltage. The peaking amplifier stage is biased dynamically to adjust the bias of peaking stage to compensate for changes in the power supply voltage. A bias voltage may be increased as the supply voltage on the peaking stage decreases, and the bias voltage may be decreased as the supply voltage on the peaking stage increases. Accordingly, bias characteristics of the peaking stage are maintained across supply voltage variations, and the efficiency of the power amplifier is improved.

    Abstract translation: 本公开包括用于功率放大器的电路和方法。 在一个实施例中,功率放大器的主放大器级和峰化放大器级接收调制电源电压。 峰值放大器级被动态偏置以调整峰值级的偏置,以补偿电源电压的变化。 随着峰值级上的电源电压降低,偏置电压可能会增加,并且偏置电压可能随着峰值级的电源电压而降低。 因此,跨电源电压变化保持峰化阶段的偏置特性,并提高功率放大器的效率。

    CIRCUITS AND METHODS FOR POWER AMPLIFICATION WITH EXTENDED HIGH EFFICIENCY
    9.
    发明申请
    CIRCUITS AND METHODS FOR POWER AMPLIFICATION WITH EXTENDED HIGH EFFICIENCY 有权
    具有更高功率功率放大的电路和方法

    公开(公告)号:US20150145600A1

    公开(公告)日:2015-05-28

    申请号:US14088321

    申请日:2013-11-22

    Abstract: The present disclosure includes circuits and methods for power amplifiers. In one embodiment, a main and peaking amplifier receive dynamic power supply voltages to operate an RF power amplifier in a high efficiency range for a particular output voltage. The power supply voltages may be changed based on an output voltage so that the power amplifier operates within a high efficiency plateau. In one embodiment, different discrete power supply voltage levels are used for different output voltage ranges. In another embodiment, a continuous time varying power supply voltage is provided as the power supply voltage. A dynamic supply voltage may be generated having a lower frequency than a signal path of the power amplifier.

    Abstract translation: 本公开包括用于功率放大器的电路和方法。 在一个实施例中,主和峰值放大器接收动态电源电压以在特定输出电压的高效率范围内操作RF功率放大器。 可以基于输出电压来改变电源电压,使得功率放大器在高效率平台内运行。 在一个实施例中,不同的分立电源电压电平用于不同的输出电压范围。 在另一个实施例中,提供连续时变电源电压作为电源电压。 可以产生具有比功率放大器的信号路径低的频率的动态电源电压。

    Amplifier linearizer with wide bandwidth

    公开(公告)号:US10277173B1

    公开(公告)日:2019-04-30

    申请号:US15816511

    申请日:2017-11-17

    Abstract: Certain aspects of the present disclosure provide methods and apparatus for amplifying signals with an amplification circuit. The amplification circuit generally includes a first transistor, an input path coupled between an input node of the amplification circuit and a control input of the first transistor, and a feedforward path coupled between the input node and a feedforward node. In certain aspects, the amplification circuit may also include a first resistive device coupled between the feedforward node and the control input of the first transistor, a biasing circuit coupled to the feedforward node, and a low-impedance path coupled to the feedforward node.

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