-
公开(公告)号：US10896861B2
公开(公告)日：2021-01-19
申请号：US16390659
申请日：2019-04-22
Applicant: Raytheon Company
Inventor： David D. Heston , John G. Heston , Claire E. Mooney , Mikel J. White , Jon Mooney , Tiffany Cassidy
IPC: H05K1/02 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/46 , H01L23/48 , H01L23/66 , H01L23/367 , H01L23/373 , H01L23/495 , H01L23/498 , H01L23/522 , H01L23/528 , H01L23/535 , H01L23/538 , H01L23/34
Abstract: An HPA MMIC assembly includes a MMIC device coupled to a thermal spreader. A ground plane is provided on the thermal spreader and coupled to FETs in the MMIC device. The multiple levels of metal separated by multiple dielectric layers provide low-loss broad-band microstrip circuits. The thermal spreader may include diamond, an air/wire-edm spreader or a multi-layer board (MLB) with heat sink vias and ground vias.
-
公开(公告)号：US10305376B1
公开(公告)日：2019-05-28
申请号：US15185363
申请日：2016-06-17
Applicant: Raytheon Company
Inventor： Claire E. Mooney , David D. Heston
Abstract: A switchable charge pump (SCP) combines a switching element and a charge pump. An SCP can be utilized within an RF circuit to allow the charge pump to be activated or deactivated in the circuit depending on incident RF power level. Multiple SCPs can be utilized to provide a generalized a single-pole N-throw (SPNT) system architecture.In one example, an RF transmit-receive (T/R) system utilizes SCPs to operate in one of three modes: transmit mode, receive mode, or self-selecting terminate mode.
-
公开(公告)号：US10778176B2
公开(公告)日：2020-09-15
申请号：US16203763
申请日：2018-11-29
Applicant: RAYTHEON COMPANY
Inventor： Richard G. Pierce , Robert S. Isom , Brandon W. Pillans , Mikel White , David D. Heston , John G. Heston
Abstract: Guanella topology balun/unun impedance transformer contains cascaded, i.e., series-coupled, coils of different sizes implemented in RF CMOS technology. The cascading of differently-sized coils provides for a large resonance-free operating bandwidth. The shunt inductive loading maximizes low frequency performance.
-
公开(公告)号：US09893683B2
公开(公告)日：2018-02-13
申请号：US15062796
申请日：2016-03-07
Applicant: Raytheon Company
Inventor： Jon Mooney , David D. Heston , Bryan G. Fast , Thomas L. Middlebrook
CPC classification number: H03F1/483 , H03F1/565 , H03F3/189 , H03F3/193 , H03F3/24 , H03F3/245 , H03F2200/222 , H03F2200/255 , H03F2200/318 , H03F2200/36 , H03F2200/451 , H03F2200/534 , H03F2200/537 , H03F2200/543 , H04B1/18
Abstract: A circuit for amplifying a source signal generated by a signal source having a first impedance includes a transmission line transformer (TLT) having a first, a second, a third, and a fourth port wherein the TLT is coupled to receive the source signal at the first port and configured to output a corresponding impedance matched signal at the second port, the second port is coupled to the third port of the TLT, the circuit also including a TLT load having a first terminal coupled to the fourth port of the TLT and a second terminal coupled to a reference potential. The circuit additionally includes an amplifier device responsive to the impedance matched signal to generate an amplified signal.
-
公开(公告)号：US08884700B2
公开(公告)日：2014-11-11
申请号：US13743570
申请日：2013-01-17
Applicant: Raytheon Company
Inventor： Jon Mooney , Bryan G. Fast , David D. Heston
CPC classification number: H03F1/30 , H01L23/34 , H01L27/0248 , H01L2924/0002 , H01L2924/00
Abstract: A temperature control system having: a resistor formed in a region of a semiconductor, such resistor having a pair of spaced electrodes in ohmic contact with the semiconductor; at least one device formed in another region of the semiconductor thermally proximate the resistor formed region, such device generating heat in the semiconductor; and circuitry, including a reference connected to one of the pair of electrodes, for operating the resistor in saturation and for sensing variation in the resistor in response to the heat generated by the device and for controlling the heat generated by the device in the semiconductor in response to the sensed variation.
Abstract translation: 一种温度控制系统，具有：形成在半导体区域中的电阻器，所述电阻器具有与所述半导体欧姆接触的一对间隔开的电极; 至少一个器件形成在半导体热电偶附近的半导体的另一个区域中，这种器件在半导体中产生热量; 以及电路，包括连接到所述一对电极中的一个电极的参考电路，用于使电阻器饱和并且响应于由器件产生的热而感测电阻器中的变化，并且用于控制半导体器件中产生的热量 响应感测的变化。
-
Patent Agency Ranking
公开(公告)号：US11342647B2
公开(公告)日：2022-05-24
申请号：US16695695
申请日：2019-11-26
Applicant: RAYTHEON COMPANY
Inventor： David D. Heston , Mikel J. White , Michael G. Hawkins
Abstract: A free-from radio frequency (RF) media includes a substrate having a first dielectric layer formed thereon and a second dielectric layer on an upper surface of the first dielectric layer. A first conductive layer is formed on an upper surface of the first dielectric layer and has a first overall profile. A second conductive layer having a second overall profile is formed on an upper surface of the second dielectric layer such that the second dielectric layer is interposed between the first and second conductive layers. The first overall profile of the first conductive layer is different from the second overall profile of the second conductive layer.
-
公开(公告)号：US20200335413A1
公开(公告)日：2020-10-22
申请号：US16390659
申请日：2019-04-22
Applicant: Raytheon Company
Inventor： David D. Heston , John G. Heston , Claire E. Mooney , Mikel J. White , Jon Mooney , Tiffany Cassidy
IPC: H01L23/34 , H01L23/498 , H01L23/66
Abstract: An HPA MMIC assembly includes a MMIC device coupled to a thermal spreader. A ground plane is provided on the thermal spreader and coupled to FETs in the MMIC device. The multiple levels of metal separated by multiple dielectric layers provide low-loss broad-band microstrip circuits. The thermal spreader may include diamond, an air/wire-edm spreader or a multi-layer board (MLB) with heat sink vias and ground vias.
-
8.发明授权Bias circuit having second order process variation compensation in a current source topology 有权偏置电路在电流源拓扑中具有二阶工艺变化补偿公开(公告)号：US09450568B1
公开(公告)日：2016-09-20
申请号：US14866096
申请日：2015-09-25
Applicant: Raytheon Company
Inventor： Michael G. Hawkins , David D. Heston
IPC: G05F1/10 , G05F3/02 , H03K3/011 , H03K17/687
CPC classification number: G05F3/02 , H03K17/162
Abstract: A bias circuit includes second order process variation compensation in a current source topology having a compensation transistor operating in saturation mode as a current source. An additional compensation transistor is biased to operate in a linear mode to provide an active resistor to vary a control voltage applied to the saturation mode compensation transistor and widen the range of sourced control current, thus widening the achievable range of the control voltage applied to the biasing transistor to produce a predetermined level of bias current despite process variations. The additional compensation transistor has been shown to be able to compensate for another approximately 20-25% of the induced variations leaving less than approximately 10% and preferably less than 5% variation in the bias current from the predetermined level at certain bias conditions and over typical fabrication process variations.
Abstract translation: 偏置电路包括具有以饱和模式工作的补偿晶体管作为电流源的电流源拓扑中的二阶工艺变化补偿。 附加的补偿晶体管被偏置以在线性模式下工作以提供有源电阻器以改变施加到饱和模式补偿晶体管的控制电压并且扩大源极控制电流的范围，从而加宽施加到所述饱和模式补偿晶体管的控制电压的可实现范围 偏置晶体管，以产生预定水平的偏置电流，尽管过程变化。 附加补偿晶体管已经被证明能够补偿另外约20-25％的诱导变化，在某些偏压条件下，偏置电流偏离预定电平的偏差电流小于约10％，优选小于5％ 典型的制造工艺变化。
-
公开(公告)号：US20210159578A1
公开(公告)日：2021-05-27
申请号：US16695695
申请日：2019-11-26
Applicant: RAYTHEON COMPANY
Inventor： David D. Heston , Mikel J. White , Michael G. Hawkins
Abstract: A free-from radio frequency (RF) media includes a substrate having a first dielectric layer formed thereon and a second dielectric layer on an upper surface of the first dielectric layer. A first conductive layer is formed on an upper surface of the first dielectric layer and has a first overall profile. A second conductive layer having a second overall profile is formed on an upper surface of the second dielectric layer such that the second dielectric layer is interposed between the first and second conductive layers. The first overall profile of the first conductive layer is different from the second overall profile of the second conductive layer.
-
公开(公告)号：US20170179885A1
公开(公告)日：2017-06-22
申请号：US14976427
申请日：2015-12-21
Applicant: Raytheon Company
Inventor： David R. Fletcher , David D. Heston
CPC classification number: H03F1/0205 , H01L23/66 , H01L24/48 , H01L24/49 , H01L2223/6611 , H01L2223/665 , H01L2224/48227 , H01L2224/49111 , H01L2924/00014 , H01L2924/1423 , H01L2924/19105 , H01L2924/19107 , H03F1/0261 , H03F1/18 , H03F1/565 , H03F3/193 , H03F3/195 , H03F3/607 , H03F2200/108 , H03F2200/451 , H03F2200/555 , H01L2224/45099 , H01L2224/05599
Abstract: Off-chip distributed drain biasing increases output power and efficiency for high power distributed amplifier MMICs. An off-chip bias circuit has a common input for receiving DC bias current and a plurality of parallel-connected bias chokes among which the DC bias current is divided. The chokes are connected to a like plurality of drain terminals at different FET amplifier stages to supply DC bias current at different locations along the output transmission line. Off-chip distributed drain biasing increases the level of DC bias current that can be made available to the amplifier and add inductances to selected FET amplifier stages, typically the earlier stages, to modify the load impedance seen at the drain terminal to better match the amplifier stages to improve power and efficiency.
-
-
-
-
-
-
-
-
-
Search Results
14
records
(took 0.014 seconds)
