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1.发明授权公开(公告)号：US10536129B2
公开(公告)日：2020-01-14
申请号：US15869105
申请日：2018-01-12
Applicant: Realtek Semiconductor Corp.
Inventor： Shih-Wei Wang
Abstract: An impedance matching circuit includes a variable impedance circuit, a reference voltage generating circuit and a control circuit. The variable impedance circuit is configured for coupling to a load having an impedance and has a variable impedance; the reference voltage generating circuit coupled to the variable impedance circuit is configured to receive an input voltage of the variable impedance circuit to generate a reference voltage; and the control circuit coupled to the variable impedance circuit and configured to generate a control signal according to the reference voltage and an output voltage of the variable impedance circuit to control the variable impedance to make the variable impedance match the impedance of the load.
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公开(公告)号：US10067521B2
公开(公告)日：2018-09-04
申请号：US15344967
申请日：2016-11-07
Applicant: Realtek Semiconductor Corp.
Inventor： Shih-Wei Wang , Chih-Chien Chang , Hsiang-An Yang
Abstract: A low dropout regulator includes a PMOS power transistor, a feedback network, an error amplifier and an active enhanced PSRR unit. The PMOS power transistor has a first end coupled to an input voltage, and a second end coupled to a load and the feedback network. The error amplifier receives a feedback signal generated from the feedback network, compares the feedback signal with a reference voltage to generate a difference value, and amplifies the difference value to generate an error signal. The active enhanced PSRR unit has one end coupled to the first end, and another end coupled to a control end of the PMOS power transistor and the error amplifier, detects an input voltage of the first end, and correspondingly adjusts a voltage of the control end to stabilize a voltage between the control end and the first end according to a variation of the input voltage.
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3.发明授权Transmission line driver circuit for automatically calibrating impedance matching 有权用于自动校准阻抗匹配的传输线驱动电路公开(公告)号：US09391583B2
公开(公告)日：2016-07-12
申请号：US14842305
申请日：2015-09-01
Applicant: Realtek Semiconductor Corp.
Inventor： Chao-Cheng Lee , Jian-Ru Lin , Shih-Wei Wang , Guan-Hong Ke
CPC classification number: H03H7/40 , H03F1/56 , H03F3/45 , H03F3/45475 , H03F2200/114 , H03F2203/45686 , H04L25/0272 , H04L25/0278 , H04L25/028
Abstract: A transmission line driver circuit includes: a transmission line driving amplifier having a first transmission terminal and a second transmission terminal; a first signal node; a second signal node; a first adjustable resistor positioned between the first transmission terminal and the first signal node; a second adjustable resistor positioned between the second transmission terminal and the second signal node; a first voltage difference generating circuit coupled with two terminals of the first adjustable resistor to generate a first voltage difference value; a second voltage difference generating circuit coupled with two terminals of the second adjustable resistor to generate a second voltage difference value; sample-and-hold circuits for generating sampled signals according to the first voltage difference value and the second voltage difference value; a comparing circuit for comparing the sampled signals; and an adjusting circuit for adjusting resistance of the first and/or second adjustable resistors according to the comparing result.
Abstract translation: 传输线驱动电路包括：具有第一传输终端和第二传输终端的传输线驱动放大器; 第一信号节点; 第二信号节点; 位于第一传输终端和第一信号节点之间的第一可调电阻器; 位于第二传输终端和第二信号节点之间的第二可调电阻器; 与所述第一可调电阻器的两个端子耦合以产生第一电压差值的第一电压差产生电路; 与所述第二可调电阻器的两个端子耦合以产生第二电压差值的第二电压差产生电路; 采样保持电路，用于根据第一电压差值和第二电压差值产生采样信号; 用于比较采样信号的比较电路; 以及根据比较结果调整第一和/或第二可调电阻器的电阻的调整电路。
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4.发明申请公开(公告)号：US20150049656A1
公开(公告)日：2015-02-19
申请号：US14327576
申请日：2014-07-10
Applicant: Realtek Semiconductor Corp.
Inventor： Ching-Yao Su , Liang-Wei Huang , Shih-Wei Wang , Hsuan-Ting Ho
CPC classification number: H04B3/20 , H03H7/40 , H04L25/03885
Abstract: An impedance adjustment method for a communication device, wherein the communication device has a plurality of impedance paths for selection, includes: selecting an initial impedance path; and utilizing a predetermined algorithm to examine a portion of the plurality of impedance paths by starting from the initial impedance path for selecting an optimized impedance path for the communication device. A delay capacitance adjustment method for a communication device, wherein the communication device has a plurality of delay capacitance paths for selection, includes: selecting an initial delay capacitance path; and utilizing a predetermined algorithm to examine a portion of the plurality of delay capacitance paths by starting from the initial delay capacitance path for selecting an optimized delay capacitance path of the communication device.
Abstract translation: 一种用于通信设备的阻抗调节方法，其中所述通信设备具有多个用于选择的阻抗路径，包括：选择初始阻抗路径; 以及利用预定算法来检查所述多个阻抗路径的一部分，从所述初始阻抗路径开始，以选择所述通信设备的优化阻抗路径。 一种用于通信设备的延迟电容调整方法，其中所述通信设备具有多个用于选择的延迟电容路径，包括：选择初始延迟电容路径; 以及利用预定算法来检查多个延迟电容路径的一部分，从初始延迟电容路径开始，以选择通信设备的优化延迟电容路径。
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5.发明授权Impedance adjustment method, delay capacitance adjustment method and associated apparatus for communication device 有权阻抗调整方法，延迟电容调整方法及通讯装置的相关装置公开(公告)号：US09484983B2
公开(公告)日：2016-11-01
申请号：US14327576
申请日：2014-07-10
Applicant: Realtek Semiconductor Corp.
Inventor： Ching-Yao Su , Liang-Wei Huang , Shih-Wei Wang , Hsuan-Ting Ho
CPC classification number: H04B3/20 , H03H7/40 , H04L25/03885
Abstract: An impedance adjustment method for a communication device, wherein the communication device has a plurality of impedance paths for selection, includes: selecting an initial impedance path; and utilizing a predetermined algorithm to examine a portion of the plurality of impedance paths by starting from the initial impedance path for selecting an optimized impedance path for the communication device. A delay capacitance adjustment method for a communication device, wherein the communication device has a plurality of delay capacitance paths for selection, includes: selecting an initial delay capacitance path; and utilizing a predetermined algorithm to examine a portion of the plurality of delay capacitance paths by starting from the initial delay capacitance path for selecting an optimized delay capacitance path of the communication device.
Abstract translation: 一种用于通信设备的阻抗调节方法，其中所述通信设备具有多个用于选择的阻抗路径，包括：选择初始阻抗路径; 以及利用预定算法来检查所述多个阻抗路径的一部分，从所述初始阻抗路径开始，以选择所述通信设备的优化阻抗路径。 一种用于通信设备的延迟电容调整方法，其中所述通信设备具有多个用于选择的延迟电容路径，包括：选择初始延迟电容路径; 以及利用预定算法来检查多个延迟电容路径的一部分，从初始延迟电容路径开始，以选择通信设备的优化延迟电容路径。
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Patent Agency Ranking
公开(公告)号：US20160233920A1
公开(公告)日：2016-08-11
申请号：US15005764
申请日：2016-01-25
Applicant: REALTEK SEMICONDUCTOR CORP.
Inventor： Shih-Wei Wang , Liang-Wei Huang , Ching-Yao Su , Sheng-Fu Chuang
Abstract: A channel detection method for an echo canceller of a communication device is provided. The method includes the following steps. A first detection signal is transmitted to an end of a channel coupled to the communication device. A plurality of taps corresponding to a reflected signal of the first detection signal are received by an echo canceller at the end of the channel. The taps corresponding to the reflected signal are compared with a reference value corresponding to each of the taps so as to determine whether each of the taps is larger than or equal to the corresponding reference value. When the tap is determined to be larger than or equal to the reference value corresponding to the tap, the tap and a position of the tap are recorded.
Abstract translation: 提供了一种用于通信设备的回波消除器的信道检测方法。 该方法包括以下步骤。 第一检测信号被发送到耦合到通信设备的信道的一端。 对应于第一检测信号的反射信号的多个抽头由通道末端的回波消除器接收。 将与反射信号对应的抽头与对应于每个抽头的参考值进行比较，以便确定每个抽头是否大于或等于对应的参考值。 当水龙头被确定为大于或等于对应于水龙头的参考值时，记录水龙头和水龙头的位置。
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7.发明申请公开(公告)号：US20180205359A1
公开(公告)日：2018-07-19
申请号：US15869105
申请日：2018-01-12
Applicant: Realtek Semiconductor Corp.
Inventor： Shih-Wei Wang
Abstract: An impedance matching circuit includes a variable impedance circuit, a reference voltage generating circuit and a control circuit. The variable impedance circuit is configured for coupling to a load having an impedance and has a variable impedance; the reference voltage generating circuit coupled to the variable impedance circuit is configured to receive an input voltage of the variable impedance circuit to generate a reference voltage; and the control circuit coupled to the variable impedance circuit and configured to generate a control signal according to the reference voltage and an output voltage of the variable impedance circuit to control the variable impedance to make the variable impedance match the impedance of the load.
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公开(公告)号：US09879970B2
公开(公告)日：2018-01-30
申请号：US14326895
申请日：2014-07-09
Applicant: REALTEK SEMICONDUCTOR CORP.
Inventor： Shih-Wei Wang , Liang-Wei Huang , Ching-Yao Su , Sheng-Fu Chuang
Abstract: A method for estimating cable length in an Ethernet system and a receiver thereof are applicable to an Ethernet system. The method for estimating cable length includes obtaining a channel tap from channel information of a feedback equalizer in the Ethernet system and estimating a cable length according to the channel tap, a first coefficient and a constant.
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公开(公告)号：US09882069B2
公开(公告)日：2018-01-30
申请号：US14872815
申请日：2015-10-01
Applicant: Realtek Semiconductor Corp.
Inventor： Shih-Wei Wang
CPC classification number: H01L31/02027 , G01J1/44 , G01J2001/444 , G01J2001/4466
Abstract: A biasing voltage generating circuit for generating a required reverse biasing voltage of an avalanche photodiode (APD) includes: a boost power converter configured to operably convert an input voltage into a higher output voltage according to a feedback signal and a reference signal, and to apply the output voltage to be a reverse biasing voltage of the APD; a reference signal generating circuit configured to operably generate the reference signal; and a control circuit. The control circuit includes: a signal sensing circuit configured to operably generate a sensed signal corresponding to an output current of the APD; an analog-to-digital converter (ADC) configured to operably convert the sensed signal into a digital signal; and a processing circuit configured to operably adjust the feedback signal or the reference signal according to the digital signal to thereby control the boost power converter to adjust the output voltage.
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公开(公告)号：US09800290B2
公开(公告)日：2017-10-24
申请号：US15005764
申请日：2016-01-25
Applicant: REALTEK SEMICONDUCTOR CORP.
Inventor： Shih-Wei Wang , Liang-Wei Huang , Ching-Yao Su , Sheng-Fu Chuang
Abstract: A channel detection method for an echo canceller of a communication device is provided. The method includes the following steps. A first detection signal is transmitted to an end of a channel coupled to the communication device. A plurality of taps corresponding to a reflected signal of the first detection signal are received by an echo canceller at the end of the channel. The taps corresponding to the reflected signal are compared with a reference value corresponding to each of the taps so as to determine whether each of the taps is larger than or equal to the corresponding reference value. When the tap is determined to be larger than or equal to the reference value corresponding to the tap, the tap and a position of the tap are recorded.
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