公开(公告)号：US10324642B2

公开(公告)日：2019-06-18

申请号：US14300231

申请日：2014-06-09

Applicant: Sanmina Corporation

Inventor： Paul Sweere ,  Jay Patel ,  Irfan Syed

IPC: G06F3/06 ,  G06F12/02 ,  G06F13/40 ,  G06F11/30 ,  G06F1/20 ,  G06F1/3206 ,  G06F1/3234 ,  G11C7/04

Abstract: A peripheral component interconnect express (PCIe) solid state drive (SSD) accelerator, having a PCIe card and separate a flash daughter-card, is provided. By including flash memory devices on a separate daughter-card, the flash memory devices are thermally decoupled from the hotter devices on the main PCIe providing additional thermal operating margins for the entire design. Furthermore, as flash memory devices are the most likely part of the subsystem to wear out over time due, including flash memory devices on a separate daughter-card allows the flash memory devices to become a field replaceable unit that can be easily replaced. EEPROMs may be included on the flash daughter-card to record the current wear state of the NAND flash devices. Knowing the wear history of the flash memory device allows the seller to replace the flash daughter-card of a customer with a daughter-card having a similar wear state.

公开(公告)号：US20180145374A1

公开(公告)日：2018-05-24

申请号：US15820363

申请日：2017-11-21

Applicant: Sanmina Corporation

Inventor： James Kenneth White ,  Paul Sweere ,  Alec Shen

IPC: H01M10/42 ,  H05B1/02 ,  H01M2/34

Abstract: An apparatus and method of keeping an energy storage cell at or above a target temperature, includes receiving at a processing circuit, an analog voltage that is proportional to a temperature of the energy storage cell, converting, at the processing circuit, the analog voltage to a pulse-width-modulated signal having a duty cycle that is proportional to the analog voltage, and driving a switch, with the pulse-width-modulated signal, between conductive and non-conductive states to modulate a voltage passing across (or a current flowing through) a heating element in series with the switch, the heating element being in thermal communication with the energy storage cell, wherein the duty cycle of the pulse-width-modulated signal is adjusted to maintain the temperature of the energy storage cell at or above the target temperature.

公开(公告)号：US09870154B2

公开(公告)日：2018-01-16

申请号：US15000949

申请日：2016-01-19

Applicant: Sanmina Corporation

Inventor： Sharad Mehrotra ,  Jack Mills ,  Chris Youngworth ,  Jon Livesey ,  Julian Ratcliffe ,  Tim Lieber ,  Paul Sweere

IPC: G06F12/00 ,  G06F3/06 ,  G06F12/02 ,  G06F12/0802 ,  G06F12/0868

CPC classification number: G06F3/061 ,  G06F3/0604 ,  G06F3/0635 ,  G06F3/0638 ,  G06F3/0647 ,  G06F3/067 ,  G06F3/0688 ,  G06F12/0246 ,  G06F12/0802 ,  G06F12/0868 ,  G06F2212/214 ,  G06F2212/7203 ,  G06F2212/7208

Abstract: A system can comprise an I/O circuitry, a processor, reconfigurable circuitry, an array of flash storage devices, and a serial interconnect network that is coupled to transfer data between the I/O circuitry, the processor, the reconfigurable circuitry and the flash storage devices. The processor can be configured to designate an interconnect address space for use in communication over the interconnect network among the I/O circuitry, the processor, the reconfigurable circuitry and the flash storage devices. The reconfigurable circuitry can be configured to translate data addresses during transfers of data between the I/O circuitry and the array of flash storage devices. A method to access an array of flash storage devices that are coupled to I/O circuitry over a serial interconnect network can comprise using reconfigurable circuitry to capture data during transfers of data over the serial interconnect network.

公开(公告)号：US09390767B2

公开(公告)日：2016-07-12

申请号：US13675819

申请日：2012-11-13

Applicant: SANMINA CORPORATION

Inventor： Paul Sweere ,  Jonathan R. Hinkle

IPC: G11C14/00 ,  G11C5/14 ,  G11C11/00 ,  G06F12/08 ,  G06F11/14

CPC classification number: G11C5/141 ,  G06F11/1441 ,  G06F12/0866 ,  G11C5/14 ,  G11C5/143 ,  G11C11/005 ,  Y02D10/13

Abstract: A memory module is provided comprising a substrate having an interface to a host system, volatile memory, non-volatile memory, and a logic device. The logic device may receive the indicator of an external triggering event and copies data from the volatile memory devices to the non-volatile memory devices upon receipt of such indicator. When the indicator of the triggering event has cleared, the logic device restores the data from the non-volatile to the volatile memory devices. The memory module may include a passive backup power source (e.g., super-capacitor) that is charged by an external power source and temporarily provides power to the memory module to copy the data from volatile to non-volatile memory. A voltage detector within the memory module may monitor the voltage of an external power source and generates an indicator of a power loss event if voltage of the external power source falls below a threshold level.

Abstract translation: 提供了一种存储器模块，其包括具有与主机系统，易失性存储器，非易失性存储器和逻辑器件的接口的衬底。 逻辑设备可以接收外部触发事件的指示符，并且在接收到这样的指示器时将数据从易失性存储器设备复制到非易失性存储器设备。 当触发事件的指示符已经清除时，逻辑器件将数据从非易失性恢复到易失性存储器件。 存储器模块可以包括被外部电源充电的无源备用电源（例如超级电容器），并且暂时向存储器模块提供电力以将数据从易失性存储器复制到非易失性存储器。 存储器模块内的电压检测器可以监视外部电源的电压，并且如果外部电源的电压低于阈值电平，则产生功率损失事件的指示器。

公开(公告)号：US10826133B2

公开(公告)日：2020-11-03

申请号：US15820363

申请日：2017-11-21

Applicant: Sanmina Corporation

Inventor： James Kenneth White ,  Paul Sweere ,  Alec Shen

IPC: H01M10/42 ,  H01M10/6571 ,  H01M10/615 ,  H01M10/658 ,  H01M10/48 ,  H01M2/34 ,  H05B1/02

Abstract: An apparatus and method of keeping an energy storage cell at or above a target temperature, includes receiving at a processing circuit, an analog voltage that is proportional to a temperature of the energy storage cell, converting, at the processing circuit, the analog voltage to a pulse-width-modulated signal having a duty cycle that is proportional to the analog voltage, and driving a switch, with the pulse-width-modulated signal, between conductive and non-conductive states to modulate a voltage passing across (or a current flowing through) a heating element in series with the switch, the heating element being in thermal communication with the energy storage cell, wherein the duty cycle of the pulse-width-modulated signal is adjusted to maintain the temperature of the energy storage cell at or above the target temperature.

公开(公告)号：US10684948B2

公开(公告)日：2020-06-16

申请号：US15820352

申请日：2017-11-21

Applicant: Sanmina Corporation

Inventor： Paul Sweere

IPC: G06F3/06 ,  G06F12/0804 ,  G06F11/14 ,  G06F11/16 ,  G06F9/4401 ,  G06F12/0868

Abstract: An apparatus and method for memory backup are disclosed as being operational at a memory module that includes a volatile memory device but which is devoid of a non-volatile memory device. The memory module can emulate operations of a non-volatile memory on the memory module while the memory module is devoid of such non-volatile memory.

公开(公告)号：US09287235B2

公开(公告)日：2016-03-15

申请号：US14696483

申请日：2015-04-27

Applicant: SANMINA CORPORATION

Inventor： Paul Sweere

IPC: B23K31/02 ,  H01L23/00 ,  H05K3/46 ,  B23K1/00 ,  H05K1/14 ,  H05K3/00 ,  H01L25/065 ,  H01L25/00 ,  H01L23/498 ,  H05K3/34 ,  H01L25/03

CPC classification number: H01L24/81 ,  B23K1/0016 ,  B23K31/02 ,  B23K2101/42 ,  H01L21/4846 ,  H01L23/13 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/11822 ,  H01L2224/131 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81011 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81205 ,  H01L2224/81815 ,  H01L2224/8192 ,  H01L2224/93 ,  H01L2924/1436 ,  H05K1/141 ,  H05K1/144 ,  H05K3/0052 ,  H05K3/3436 ,  H05K3/4697 ,  H05K2201/10378 ,  Y10T29/49165 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/83815

Abstract: Methods for forming a stacking interposer are provided that create a more compact and/or reliable interposer cavity. According to one method, a segmentation process that partially cuts a multi-cell, multi-layer PCB panel to a controlled depth along the internal walls/edges of a cavity region with each of the interposer cell sites defined within the PCB panel is used. The material within the cavity region is then removed (by routing) to a controlled depth to form the internal cavity for each interposer cell site. Pillars may then be removed from the PCB panel. As a result of the initial partial cuts of the internal walls of the cavity region, the corners of the cavities may have a square configuration for fitting over the top of a BGA/memory device (which has very square corners).

公开(公告)号：US20160011927A1

公开(公告)日：2016-01-14

申请号：US14794764

申请日：2015-07-08

Applicant: Sanmina Corporation

Inventor： Paul Sweere

IPC: G06F11/07 ,  G06F1/26

CPC classification number: G06F1/266 ,  G06F1/263 ,  G06F11/006

Abstract: The present disclosure is directed to visual field replacement unit (FRU) identification and retaining FRU status information of one or more field replaceable units in a host system device when one or more of the field replaceable units is removed from the host system device disconnecting host power to the removed field replaceable unit(s). The one or more field replaceable units may be located on a carrier printed circuit board assembly and the host system device may contain multiple field replaceable units and/or multiple carrier printed circuit board subassemblies. Once the host power is disconnected from the carrier, an alternate power source continues to provide power to keep the FRU indicator illuminated for repairs or replacement. The FRU indicator is illuminated long enough for a service technician to place the carrier on a bench or table top and recognize the failed FRU from the remaining FRUs.

Abstract translation: 本公开涉及当主机系统设备中的一个或多个现场可更换单元从主系统设备断开主机功率时，在主机系统设备中的视场替换单元（FRU）识别和保留一个或多个现场可更换单元的FRU状态信息 到已移除的现场可更换单元。 一个或多个现场可更换单元可以位于载体印刷电路板组件上，并且主机系统设备可以包含多个现场可更换单元和/或多个载体印刷电路板子组件。 一旦主机与运营商断开连接，备用电源将继续提供电源，以保持FRU指示灯亮起以进行维修或更换。 FRU指示灯被照亮足够长的时间，维修技术人员将承运人放置在工作台或桌面上，并从剩余的FRU识别故障FRU。

公开(公告)号：US20150228615A1

公开(公告)日：2015-08-13

申请号：US14696483

申请日：2015-04-27

Applicant: SANMINA CORPORATION

Inventor： Paul Sweere

IPC: H01L23/00 ,  B23K1/00 ,  B23K31/02 ,  H01L23/498

CPC classification number: H01L24/81 ,  B23K1/0016 ,  B23K31/02 ,  B23K2101/42 ,  H01L21/4846 ,  H01L23/13 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/11822 ,  H01L2224/131 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81011 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81205 ,  H01L2224/81815 ,  H01L2224/8192 ,  H01L2224/93 ,  H01L2924/1436 ,  H05K1/141 ,  H05K1/144 ,  H05K3/0052 ,  H05K3/3436 ,  H05K3/4697 ,  H05K2201/10378 ,  Y10T29/49165 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/83815

Abstract: Methods for forming a stacking interposer are provided that create a more compact and/or reliable interposer cavity. According to one method, a segmentation process that partially cuts a multi-cell, multi-layer PCB panel to a controlled depth along the internal walls/edges of a cavity region with each of the interposer cell sites defined within the PCB panel is used. The material within the cavity region is then removed (by routing) to a controlled depth to form the internal cavity for each interposer cell site. Pillars may then be removed from the PCB panel. As a result of the initial partial cuts of the internal walls of the cavity region, the corners of the cavities may have a square configuration for fitting over the top of a BGA/memory device (which has very square corners).

Abstract translation: 提供了形成堆叠插入件的方法，其形成更紧凑和/或可靠的插入器腔。 根据一种方法，使用分割过程，其将多单元，多层PCB面板部分地切割成沿着腔区域的内壁/边缘的受控深度，其中每个插入器单元位置限定在PCB面板内。 然后将空腔区域内的材料（通过路由）移除到受控的深度，以形成每个插入单元位置的内部空腔。 然后可以从PCB面板移除支柱。 作为腔区域的内壁的初始部分切割的结果，空腔的角部可以具有用于配合在BGA /存储器件（其具有非常方形拐角）的顶部上的正方形构造。

公开(公告)号：US09016552B2

公开(公告)日：2015-04-28

申请号：US14216517

申请日：2014-03-17

Applicant: Sanmina Corporation

Inventor： Paul Sweere

IPC: B23K31/02 ,  H01L23/00 ,  H05K3/46 ,  B23K1/00

CPC classification number: H01L24/81 ,  B23K1/0016 ,  B23K31/02 ,  B23K2101/42 ,  H01L21/4846 ,  H01L23/13 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/11822 ,  H01L2224/131 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81011 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81205 ,  H01L2224/81815 ,  H01L2224/8192 ,  H01L2224/93 ,  H01L2924/1436 ,  H05K1/141 ,  H05K1/144 ,  H05K3/0052 ,  H05K3/3436 ,  H05K3/4697 ,  H05K2201/10378 ,  Y10T29/49165 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/83815

Abstract: Methods for forming a stacking interposer are provided that create a more compact and/or reliable interposer cavity. According to one method, a segmentation process that partially cuts a multi-cell, multi-layer PCB panel to a controlled depth along the internal walls/edges of a cavity region with each of the interposer cell sites defined within the PCB panel is used. The material within the cavity region is then removed (by routing) to a controlled depth to form the internal cavity for each interposer cell site. Pillars may then be removed from the PCB panel. As a result of the initial partial cuts of the internal walls of the cavity region, the corners of the cavities may have a square configuration for fitting over the top of a BGA/memory device (which has very square corners).

Abstract translation: 提供了形成堆叠插入件的方法，其形成更紧凑和/或可靠的插入器腔。 根据一种方法，使用分割过程，其将多单元，多层PCB面板部分地切割成沿着腔区域的内壁/边缘的受控深度，其中每个插入器单元位置限定在PCB面板内。 然后将空腔区域内的材料（通过路由）移除到受控的深度，以形成每个插入单元位置的内部空腔。 然后可以从PCB面板移除支柱。 作为腔区域的内壁的初始部分切割的结果，空腔的角部可以具有用于配合在BGA /存储器件（其具有非常方形拐角）的顶部上的正方形构造。