公开(公告)号：US09698064B2

公开(公告)日：2017-07-04

申请号：US14644249

申请日：2015-03-11

Applicant: SEIKO INSTRUMENTS INC.

Inventor： Yasuhiro Taguchi

IPC: H01L23/48 ,  H01L23/52 ,  H01L23/495 ,  H01L21/66 ,  H01L21/48 ,  H01L23/31

CPC classification number: H01L22/14 ,  H01L21/4842 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49551 ,  H01L23/49582 ,  H01L23/49805 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/85399

Abstract: A semiconductor device uses a lead frame, in which an outer lead is electrically connected to an inner lead suspension lead via an inner lead. An encapsulating resin covers the inner lead and part of the outer lead, and a plated film is formed on an outer lead cut surface so that a solder layer is easily formed on all surfaces of the outer lead extending from the encapsulating resin. The inner lead suspension lead includes a narrowed portion that is smaller in cross-sectional area than other portions of the inner lead suspension lead to suppress impact forces generated when the inner lead suspension lead is cut.

公开(公告)号：US10850334B2

公开(公告)日：2020-12-01

申请号：US14946903

申请日：2015-11-20

Applicant: SEIKO INSTRUMENTS INC.

Inventor： Yasuhiro Taguchi

IPC: H01L23/495 ,  H01L23/28 ,  H01L23/29 ,  B23C3/00 ,  H01L21/56

Abstract: A mold is configured to resin-seal a semiconductor chip to form a semiconductor package. The mold has a first mold cavity and a second mold cavity formed in the bottom of the first mold cavity with a stepped portion between the two mold cavities. The two mold cavities are formed in succession by a high-speed rotary cutter having a downwardly tapered round cutting surface that imparts a corresponding taper to walls of the two mold cavities.

公开(公告)号：US10109561B2

公开(公告)日：2018-10-23

申请号：US14641491

申请日：2015-03-09

Applicant: SEIKO INSTRUMENTS INC.

Inventor： Yasuhiro Taguchi

IPC: H01L23/52 ,  H01L23/48 ,  H01L23/495 ,  H01L23/00 ,  H01L21/48 ,  H01L23/31

Abstract: A semiconductor device has a semiconductor chip mounted on an island of a lead frame and covered by an encapsulating resin. An outer lead extends from the encapsulating resin and is connected within the encapsulating resin to an inner lead connected to an inner lead suspension lead. A plated film is plated on the exposed surfaces of the outer lead that extend from the encapsulating resin to improve solder bonding strength of the semiconductor device onto a substrate.

公开(公告)号：US09136208B2

公开(公告)日：2015-09-15

申请号：US14499802

申请日：2014-09-29

Applicant: SEIKO INSTRUMENTS INC.

Inventor： Yasuhiro Taguchi

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/49517 ,  H01L21/4825 ,  H01L21/4842 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49548 ,  H01L23/49582 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2924/00

Abstract: A semiconductor device has an encapsulating resin for covering a semiconductor chip and an outer lead extending from a side surface of the encapsulating resin. An inclined portion is formed in a bottom surface of the outer lead. A through recessed portion is formed in an end surface of the outer lead so as to vertically pass through the outer lead from an upper surface of the outer lead to the inclined portion. A thick plated layer covers the inclined portion and an inner surface of the through recessed portion. A thin plated layer covers the end surface of the outer lead.

Abstract translation: 半导体器件具有用于覆盖半导体芯片的封装树脂和从封装树脂的侧表面延伸的外引线。 在外引线的底面形成有倾斜部。 在外引线的端面形成贯通凹部，从外引线的上表面向倾斜部垂直地穿过外引线。 厚镀层覆盖倾斜部和贯通凹部的内表面。 薄镀层覆盖外引线的端面。