公开(公告)号：US10771281B1

公开(公告)日：2020-09-08

申请号：US16673607

申请日：2019-11-04

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Tomas Suchy ,  Lukas Vykydal ,  Pavel Hartl ,  Marek Hustava

IPC: H04B3/00 ,  H04L12/40 ,  H04L25/02

Abstract: A semi-differential signaling technique as well as bus devices and communication systems that exploit this technique to enhance the performance of the DSI3 bus. In one embodiment, there is provided a DSI3 master device that can be coupled to a DSI3 slave device via a bus having at least a power supply conductor, a power return conductor, and a signal conductor. The master device includes: a power supply node and a power return node that respectively connect to the power supply conductor and the power return conductor to supply power to the slave device; a signal node that connects to the signal conductor; and a driver that drives the signal node relative to a reference voltage midway between voltages of the power supply node and the power return node.

公开(公告)号：US10756925B2

公开(公告)日：2020-08-25

申请号：US16359693

申请日：2019-03-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Marek Hustava ,  Tomas Suchy ,  Lukas Vykydal ,  Pavel Hartl

IPC: H03M1/50 ,  H04L12/40 ,  H04L29/08

Abstract: Disclosed DSI3 slave devices may enhance the data rate of the DSI3 bus using modified nibble encoding, pulse shaping, spectral shaping, and/or message preambles to provide chip time and level tracking. In one embodiment, there is provided a communications method that includes: converting a binary data stream into a ternary unipolar non-return-to-zero level channel signal; and driving the channel signal as an electrical current on a signal conductor. The converting uses an encoder that maps binary nibbles to a set of ternary triplets, each triplet in the set having an average level between 2/3 and 4/3 inclusive, and each triplet including at least one internal transition between levels.