公开(公告)号：US11107753B2

公开(公告)日：2021-08-31

申请号：US16203072

申请日：2018-11-28

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Stephen St. Germain ,  Roger Arbuthnot ,  David Billings ,  Andrew Celaya

IPC: H01L23/495 ,  H01L25/065 ,  H01L23/64 ,  H01L21/56 ,  H01L23/31 ,  H01L29/20

Abstract: Implementations of semiconductor packages may include: a substrate having one or more traces on a first side and one or more traces on a second side of the substrate. The substrate may be rigid. The packages may include at least one die mechanically and electrically coupled to the first side of the substrate. The die may be a high voltage die. The package may include one or more traces along one or more edges of the substrate. The one or more traces along the one or more edges of the substrate provide electrical connectivity between the one or more traces on the first side of the substrate and the one or more traces on the second side of the substrate. The package may also include a molding compound encapsulating at least the first and the one or more edges of the ceramic substrate.

公开(公告)号：US11842942B2

公开(公告)日：2023-12-12

申请号：US17655398

申请日：2022-03-18

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Liangbiao Chen ,  Yong Liu ,  Tzu-Hsuan Cheng ,  Stephen St. Germain ,  Roger Arbuthnot

IPC: H01L23/367 ,  H01L23/373 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H05K7/20

CPC classification number: H01L23/3675 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/3735 ,  H01L24/32 ,  H05K7/2089 ,  H01L2224/32245 ,  H01L2224/84801 ,  H01L2924/13055

Abstract: A power module includes a spacer block, a thermally conductive substrate coupled to one side of the spacer block, and a semiconductor device die coupled to an opposite side of the spacer block. The spacer block includes a solid spacer block and an adjacent flexible spacer block. An inner portion of the device die is coupled to the solid spacer block, and an outer portion of the semiconductor device die is coupled to the adjacent flexible spacer block.

公开(公告)号：US11282764B2

公开(公告)日：2022-03-22

申请号：US16784999

申请日：2020-02-07

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Liangbiao Chen ,  Yong Liu ,  Tzu-Hsuan Cheng ,  Stephen St. Germain ,  Roger Arbuthnot

IPC: H01L23/367 ,  H01L23/373 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H05K7/20

Abstract: A power module includes a spacer block, a thermally conductive substrate coupled to one side of the spacer block, and a semiconductor device die coupled to an opposite side of the spacer block. The spacer block includes a solid spacer block and an adjacent flexible spacer block. An inner portion of the device die is coupled to the solid spacer block, and an outer portion of the semiconductor device die is coupled to the adjacent flexible spacer block.

公开(公告)号：US09646919B2

公开(公告)日：2017-05-09

申请号：US15166065

申请日：2016-05-26

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Stephen St. Germain ,  Roger Arbuthnot ,  Peter Moens

IPC: H01L25/07 ,  H01L23/495 ,  H01L29/78 ,  H01L23/31 ,  H01L23/498 ,  H01L23/522 ,  H01L23/482 ,  H01L29/417 ,  H01L29/06 ,  H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L21/78 ,  H01L29/20

CPC classification number: H01L23/49524 ,  H01L21/4825 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/482 ,  H01L23/4824 ,  H01L23/49562 ,  H01L24/16 ,  H01L24/83 ,  H01L29/0696 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/78 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16245 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A semiconductor package. Implementations may include a lateral device that may include a lateral semiconductor device including one of interspersed and interdigitated source and drain regions and one or more gate regions, a single layer clip, and a leadframe. The single layer clip may be coupled to the one of interspersed and interdigitated source and drain regions and the one or more gate regions and to the leadframe. The single layer clip may be configured to redistribute and to isolate source, drain, and gate signals passing into and out from the lateral semiconductor device during operation of the semiconductor device package.