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公开(公告)号：US09648265B2
公开(公告)日：2017-05-09
申请号：US14264984
申请日：2014-04-29
Applicant: Semiconductor Components Industries, LLC
Inventor： Roger Panicacci , Jeffery Beck , Barry Vanhoff
CPC classification number: H04N5/378 , H04N5/357 , H04N5/361 , H04N5/3658
Abstract: An image sensor may have an array of pixels and readout circuitry. The array may include image pixels that generate signals in response to image light and reference pixels that generate signals in response to electrical noise. The readout circuitry may obtain first pixel values from the image pixels and may obtain second pixel values from the reference pixels. The readout circuitry may generate an extended precision pixel value based on the second pixel values that have an extended bit width relative to the each of the second pixel values. The readout circuitry may generate multiple dithered correction values by adding randomized sequences of least significant bits to the extended precision pixel value. The readout circuitry may mitigate visible quantization error and noise such as row-correlated and column-correlated noise in the final image by subtracting the dithered correction values from corresponding first pixel values.
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公开(公告)号：US10859434B2
公开(公告)日：2020-12-08
申请号：US15992853
申请日：2018-05-30
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Roger Panicacci
Abstract: An image sensor may include an array of image pixels coupled to analog-to-digital conversion circuitry formed from pinned photodiode charge transfer circuits. Majority charge carriers for the pinned photodiodes in the charge transfer circuits may be electrons for photodiode wells formed from n-type doped regions and may be holes for photodiode formed from p-type doped regions. Pinned photodiodes may be used for charge integration onto a capacitive circuit node. Pinned photodiodes may also be used for charge subtraction from a capacitive circuit node. Comparator circuitry may be used to determine digital values for the pixel output levels in accordance with single-slope conversion, successive-approximation-register conversion, cyclic conversion, and first or second order delta-sigma conversion techniques. The array of image pixels used for imaging may have a conversion mode wherein at least a portion of the pixel circuitry in the array are operated similar to the charge transfer circuits.
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公开(公告)号：US10249656B2
公开(公告)日：2019-04-02
申请号：US15175960
申请日：2016-06-07
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Roger Panicacci
IPC: H01L27/146 , H03M1/12 , H03M1/46 , H03M1/56 , H03M3/00
Abstract: An image sensor may include an array of image pixels coupled to analog-to-digital conversion circuitry formed from pinned photodiode charge transfer circuits. Majority charge carriers for the pinned photodiodes in the charge transfer circuits may be electrons for photodiode wells formed from n-type doped regions and may be holes for photodiode formed from p-type doped regions. Pinned photodiodes may be used for charge integration onto a capacitive circuit node. Pinned photodiodes may also be used for charge subtraction from a capacitive circuit node. Comparator circuitry may be used to determine digital values for the pixel output levels in accordance with single-slope conversion, successive-approximation-register conversion, cyclic conversion, and first or second order delta-sigma conversion techniques. The array of image pixels used for imaging may have a conversion mode wherein at least a portion of the pixel circuitry in the array are operated similar to the charge transfer circuits.
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Patent Agency Ranking
公开(公告)号：US11343454B2
公开(公告)日：2022-05-24
申请号：US16854057
申请日：2020-04-21
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Roger Panicacci , Tim W. Chan
Abstract: Imaging circuitry may include circuits for implementing feature extraction in the analog domain. The imaging circuitry may include pixels configured to generate pixel values. The pixel values may then be weighted using variable charge integration times, variable resistors in the readout path, and/or variable switch on times in the readout path. The weighted pixels values may be binned and combined to obtain an output neuron voltage for at least one layer in a neural network. Performing feature extraction in the analog domain for each layer of results in the neural network saves power and area by avoiding the need to move data around to conventional digital memories.
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公开(公告)号：US10192922B2
公开(公告)日：2019-01-29
申请号：US15175957
申请日：2016-06-07
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Roger Panicacci
Abstract: An image sensor may include an array of image pixels coupled to analog-to-digital conversion circuitry formed from pinned photodiode charge transfer circuits. Majority charge carriers for the pinned photodiodes in the charge transfer circuits may be electrons for photodiode wells formed from n-type doped regions and may be holes for photodiode formed from p-type doped regions. Pinned photodiodes may be used for charge integration onto a capacitive circuit node. Pinned photodiodes may also be used for charge subtraction from a capacitive circuit node. Comparator circuitry may be used to determine digital values for the pixel output levels in accordance with single-slope conversion, successive-approximation-register conversion, cyclic conversion, and first or second order delta-sigma conversion techniques. The array of image pixels used for imaging may have a conversion mode wherein at least a portion of the pixel circuitry in the array are operated similar to the charge transfer circuits.
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6.发明申请公开(公告)号：US20150312499A1
公开(公告)日：2015-10-29
申请号：US14264984
申请日：2014-04-29
Applicant: Semiconductor Components Industries, LLC
Inventor： Roger Panicacci , Jeffery Beck , Barry Vanhoff
CPC classification number: H04N5/378 , H04N5/357 , H04N5/361 , H04N5/3658
Abstract: An image sensor may have an array of pixels and readout circuitry. The array may include image pixels that generate signals in response to image light and reference pixels that generate signals in response to electrical noise. The readout circuitry may obtain first pixel values from the image pixels and may obtain second pixel values from the reference pixels. The readout circuitry may generate an extended precision pixel value based on the second pixel values that have an extended bit width relative to the each of the second pixel values. The readout circuitry may generate multiple dithered correction values by adding randomized sequences of least significant bits to the extended precision pixel value. The readout circuitry may mitigate visible quantization error and noise such as row-correlated and column-correlated noise in the final image by subtracting the dithered correction values from corresponding first pixel values.
Abstract translation: 图像传感器可以具有像素阵列和读出电路。 阵列可以包括响应于图像光产生信号的图像像素和响应于电噪声产生信号的参考像素。 读出电路可以从图像像素获得第一像素值，并且可以从参考像素获得第二像素值。 读出电路可以基于相对于每个第二像素值具有扩展位宽的第二像素值来生成扩展精度像素值。 读出电路可以通过将最低有效位的随机序列添加到扩展精度像素值来生成多个抖动校正值。 读出电路可以通过从对应的第一像素值减去抖动校正值来减轻最终图像中的可见量化误差和噪声，例如行相关和列相关噪声。
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公开(公告)号：US10001406B2
公开(公告)日：2018-06-19
申请号：US15175958
申请日：2016-06-07
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Roger Panicacci
CPC classification number: G01J1/4228 , G01J1/44 , G01J2001/446 , H04N5/378
Abstract: An image sensor may include an array of image pixels coupled to analog-to-digital conversion circuitry formed from pinned photodiode charge transfer circuits. Majority charge carriers for the pinned photodiodes in the charge transfer circuits may be electrons for photodiode wells formed from n-type doped regions and may be holes for photodiode formed from p-type doped regions. Pinned photodiodes may be used for charge integration onto a capacitive circuit node. Pinned photodiodes may also be used for charge subtraction from a capacitive circuit node. Comparator circuitry may be used to determine digital values for the pixel output levels in accordance with single-slope conversion, successive-approximation-register conversion, cyclic conversion, and first or second order delta-sigma conversion techniques. The array of image pixels used for imaging may have a conversion mode wherein at least a portion of the pixel circuitry in the array are operated similar to the charge transfer circuits.
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公开(公告)号：US09848141B2
公开(公告)日：2017-12-19
申请号：US15151078
申请日：2016-05-10
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Roger Panicacci , Marko Mlinar
CPC classification number: H04N5/3592 , H04N5/3745 , H04N5/378 , H04N9/045 , H04N2209/045
Abstract: An image sensor may include an array of image sensor pixels. Each image sensor pixel may have signal storage capabilities implemented through a write-back supply line and a control transistor for the supply line. Each image sensor pixel may output pixel values over column lines to switching circuitry. The switching circuitry may route the pixel values to signal processing circuitry. The signal processing circuitry may perform analog and/or digital processing operations utilizing analog circuits or pinned diode devices for image signal processing on the pixel values to output processed pixel values. The processing circuitry may send the processed pixel values back to the array. This allows the array to act as memory circuitry to support processing operations on processing circuitry in close proximity to the array. Configured this way, signal processing can be performed in close proximity to the array without having to move pixel signals to peripheral processing circuitry.
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