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公开(公告)号:US11658024B2
公开(公告)日:2023-05-23
申请号:US17071310
申请日:2020-10-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeonggyu Song , Kyooho Jung , Yongsung Kim , Jeongil Bang , Jooho Lee , Junghwa Kim , Haeryong Kim , Myoungho Jeong
IPC: H01L21/02 , H01L29/786 , H01L29/66 , H01L21/768
CPC classification number: H01L21/02181 , H01L21/0245 , H01L21/02381 , H01L21/02389 , H01L21/02403 , H01L21/02472 , H01L21/02667 , H01L21/76871 , H01L29/66969 , H01L29/7869
Abstract: A semiconductor device and a method of manufacturing the semiconductor device are included. The method of manufacturing the semiconductor device includes forming a hafnium oxide layer on a substrate and crystallizing the hafnium oxide layer by using a hafnium cobalt oxide layer as a seed layer. According to the method of manufacturing the semiconductor device, a thin-film hafnium oxide layer may be easily crystallized.
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公开(公告)号:US11424317B2
公开(公告)日:2022-08-23
申请号:US16839641
申请日:2020-04-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeonggyu Song , Kyooho Jung , Younsoo Kim , Haeryong Kim , Jooho Lee
IPC: H01L27/108 , H01L49/02 , H01L21/285
Abstract: A capacitor includes: a lower electrode including a metal nitride represented by MM′N, wherein M is a metal element, M′ is an element different from M, and N is nitrogen; a dielectric layer on the lower electrode; an interfacial layer between the lower electrode and the dielectric layer and including a metal nitrate represented by MM′ON, wherein M is a metal element, M′ is an element different from M, N is nitrogen, and O is oxygen; and an upper electrode on the dielectric layer.
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公开(公告)号:US11342414B2
公开(公告)日:2022-05-24
申请号:US17001925
申请日:2020-08-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minhyun Lee , Haeryong Kim , Hyeonjin Shin , Seunggeol Nam , Seongjun Park
IPC: H01L29/08 , H01L29/417 , H01L29/04 , H01L29/06 , H01L29/267 , H01L29/78 , H01L21/285 , H01L29/45 , H01L29/16 , H01L29/165
Abstract: A semiconductor device includes a semiconductor layer, a metal layer electrically contacting the semiconductor layer, and a two-dimensional material layer between the semiconductor layer and the metal layer and having a two-dimensional crystal structure.
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公开(公告)号:US11257899B2
公开(公告)日:2022-02-22
申请号:US16895362
申请日:2020-06-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Haeryong Kim , Jungmin Park , Yongsung Kim , Jooho Lee
IPC: H01L49/02 , H01L29/78 , H01L21/02 , H01L27/108 , H01L29/51
Abstract: Provided are a film structure including hafnium oxide, an electronic device including the same, and a method of manufacturing the same. The film structure including hafnium oxide includes a hafnium oxide layer including hafnium oxide crystallized in a tetragonal phase, and first and second stressor layers apart from each other with the hafnium oxide layer therebetween and applying compressive stress to the hafnium oxide layer.
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公开(公告)号:US11018001B2
公开(公告)日:2021-05-25
申请号:US16922330
申请日:2020-07-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Haeryong Kim , Hyeonjin Shin , Jaeho Lee , Sanghyun Jo
IPC: H01L21/02 , H01L29/66 , H01L29/786 , H01L29/778 , H01L29/24
Abstract: A method of growing a two-dimensional transition metal dichalcogenide (TMD) thin film and a method of manufacturing a device including the two-dimensional TMD thin film are provided. The method of growing the two-dimensional TMD thin film may include a precursor supply operation and an evacuation operation, which are periodically and repeatedly performed in a reaction chamber provided with a substrate for thin film growth. The precursor supply operation may include supplying two or more kinds of precursors of a TMD material to the reaction chamber. The evacuation operation may include evacuating the two or more kinds of precursors and by-products generated therefrom from the reaction chamber.
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公开(公告)号:US09922825B2
公开(公告)日:2018-03-20
申请号:US14728583
申请日:2015-06-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minhyun Lee , Hyeonjin Shin , Jaeho Lee , Haeryong Kim
IPC: H01L29/06 , H01L21/02 , H01L29/78 , H01L29/786 , H01L29/66 , H01L29/778 , H01L29/24 , H01L29/41 , H01L29/16
CPC classification number: H01L21/02568 , H01L21/0259 , H01L21/02628 , H01L29/0673 , H01L29/1606 , H01L29/24 , H01L29/413 , H01L29/66742 , H01L29/66969 , H01L29/778 , H01L29/7839 , H01L29/786 , H01L29/78654 , H01L29/78681 , H01L29/78684 , H01L29/78696
Abstract: An electronic device includes first and second electrodes that are spaced apart from each other and a 2D material layer. The 2D material layer connects the first and second electrodes. The 2D material layer includes a plurality of 2D nanomaterials. At least some of the 2D nanomaterials overlap one another.
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公开(公告)号:US12199137B2
公开(公告)日:2025-01-14
申请号:US17583790
申请日:2022-01-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jinho Lee , Younsoo Kim , Haeryong Kim , Sunghyun Kim
Abstract: An integrated circuit (IC) device includes a lower electrode including a first metal, a dielectric film on the lower electrode, and a conductive interface layer between the lower electrode and the dielectric film. The conductive interface layer includes a metal oxide film including at least one metal element. An upper electrode including a second metal is opposite the lower electrode, with the conductive interface layer and the dielectric film therebetween. To manufacture an IC device, an electrode including a metal is formed adjacent to an insulating pattern on a substrate. A conductive interface layer including a metal oxide film including at least one metal element is selectively formed on a surface of the electrode. A dielectric film is formed to be in contact with the conductive interface layer and the insulating pattern.
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公开(公告)号:US11985910B2
公开(公告)日:2024-05-14
申请号:US17836435
申请日:2022-06-09
Inventor: Minhyun Lee , Dovran Amanov , Renjing Xu , Houk Jang , Haeryong Kim , Hyeonjin Shin , Yeonchoo Cho , Donhee Ham
CPC classification number: H10N70/826 , H10B63/80 , H10N70/24 , H10N70/8416
Abstract: Provided are memristors and neuromorphic devices including the memristors. A memristor includes a lower electrode and an upper electrode that are apart from each other and first and second two-dimensional material layers that are arranged between the lower electrode and the upper electrode and stacked without a chemical bond therebetween.
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公开(公告)号:US11810946B2
公开(公告)日:2023-11-07
申请号:US17749702
申请日:2022-05-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeonggyu Song , Kyooho Jung , Younsoo Kim , Haeryong Kim , Jooho Lee
IPC: H10B12/00 , H01L21/285 , H01L49/02
CPC classification number: H01L28/60 , H01L21/28556 , H10B12/30
Abstract: A capacitor includes: a lower electrode including a metal nitride represented by MM′N, wherein M is a metal element, M′ is an element different from M, and N is nitrogen; a dielectric layer on the lower electrode; an interfacial layer between the lower electrode and the dielectric layer and including a metal nitrate represented by MM′ON, wherein M is a metal element, M′ is an element different from M, N is nitrogen, and O is oxygen; and an upper electrode on the dielectric layer.
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公开(公告)号:US11804518B2
公开(公告)日:2023-10-31
申请号:US17034181
申请日:2020-09-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jungmin Park , Haeryong Kim , Young-geun Park
IPC: H01L21/762 , H10B12/00 , H01L21/02 , H01L49/02 , C23C16/40
CPC classification number: H01L21/02197 , H01L21/7624 , H01L28/55 , H01L28/65 , H10B12/00 , C23C16/40 , H01L28/60 , H10B12/0335 , H10B12/315
Abstract: A semiconductor device includes a capacitor including a lower electrode an upper electrode, and a dielectric layer between the lower electrode and the upper electrode. The lower electrode includes ABO3 where ‘A’ is a first metal element and ‘B’ is a second metal element having a work function greater than that of the first metal element. The dielectric layer includes CDO3 where ‘C’ is a third metal element and ‘D’ is a fourth metal element. The lower electrode includes a first layer and a second layer which are alternately and repeatedly stacked. The first layer includes the first metal element and oxygen. The second layer includes the second metal element and oxygen. The dielectric layer is in contact with the lower electrode at a first contact surface the first contact surface corresponding to the second layer.
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