公开(公告)号：US10310975B2

公开(公告)日：2019-06-04

申请号：US15152374

申请日：2016-05-11

Applicant: Seagate Technology LLC

Inventor： Shashank Nemawarkar ,  Balakrishnan Sundararaman ,  Mark Ish ,  Siddhartha Kumar Panda ,  Bagavathy Raj Arunachalam

IPC: G06F11/07 ,  G06F12/0804 ,  G06F3/06 ,  G06F12/0868 ,  G06F11/14 ,  G06F1/32 ,  G06F1/3234 ,  G06F11/20

Abstract: The disclosed technology provides for selection of a subset of available non-volatile memory devices in an array to receive a dirty cache data of a volatile cache responsive to detection of a power failure. In one implementation, the selection of the non-volatile memory devices is based on one or more predictive power parameters usable to estimate a time remaining during which a reserve power supply can support a cache offload to the selected subset of devices.

公开(公告)号：US20180081558A1

公开(公告)日：2018-03-22

申请号：US15709681

申请日：2017-09-20

Applicant: Seagate Technology LLC

Inventor： Mark Ish ,  Siddhartha Kumar Panda ,  Dileep Kumar Sharma ,  Durga Prasad Bhattarai

IPC: G06F3/06 ,  G06F13/40 ,  G06F13/42

CPC classification number: G06F3/0607 ,  G06F3/0655 ,  G06F3/0688 ,  G06F13/4022 ,  G06F13/4282 ,  G06F2213/0026

Abstract: Method and apparatus for asynchronous discovery of processing and storage nodes coupled via an expander switch in a fabric. In some embodiments, an initiator device operates as a processing node to transfer data to and from a non-volatile memory (NVM) of a target device at a storage node. One of the initiator or target devices is activated prior to the other device. The second activated device broadcasts a discovery command responsive to the activation of the second activated device and prior to receipt of a request for the discovery command from the first activated device. The first activated device processes the discovery command to establish an I/O communication link between the first activated device and the second activated device. The discovery command may include a non-volatile memory express (NVMe) controller list, and the NVM may be arranged as one or more NVMe namespaces.

公开(公告)号：US10534541B2

公开(公告)日：2020-01-14

申请号：US15709681

申请日：2017-09-20

Applicant: Seagate Technology LLC

Inventor： Mark Ish ,  Siddhartha Kumar Panda ,  Dileep Kumar Sharma ,  Durga Prasad Bhattarai

IPC: G06F13/40 ,  G06F3/06 ,  G06F13/42

Abstract: Method and apparatus for asynchronous discovery of processing and storage nodes coupled via an expander switch in a fabric. In some embodiments, an initiator device operates as a processing node to transfer data to and from a non-volatile memory (NVM) of a target device at a storage node. One of the initiator or target devices is activated prior to the other device. The second activated device broadcasts a discovery command responsive to the activation of the second activated device and prior to receipt of a request for the discovery command from the first activated device. The first activated device processes the discovery command to establish an I/O communication link between the first activated device and the second activated device. The discovery command may include a non-volatile memory express (NVMe) controller list, and the NVM may be arranged as one or more NVMe namespaces.

公开(公告)号：US20170329707A1

公开(公告)日：2017-11-16

申请号：US15152374

申请日：2016-05-11

Applicant: Seagate Technology LLC

Inventor： Shashank Nemawarkar ,  Balakrishnan Sundararaman ,  Mark Ish ,  Siddhartha Kumar Panda ,  Bagavathy Raj Arunachalam

IPC: G06F12/0804 ,  G06F3/06 ,  G06F11/07 ,  G06F1/30 ,  G06F12/0868

CPC classification number: G06F12/0804 ,  G06F3/0619 ,  G06F3/0647 ,  G06F3/0683 ,  G06F11/1441 ,  G06F11/1446 ,  G06F11/2015 ,  G06F12/0868 ,  G06F2212/1032 ,  G06F2212/281 ,  G06F2212/313 ,  G06F2212/7208

Abstract: The disclosed technology provides for selection of a subset of available non-volatile memory devices in an array to receive a dirty cache data of a volatile cache responsive to detection of a power failure. In one implementation, the selection of the non-volatile memory devices is based on one or more predictive power parameters usable to estimate a time remaining during which a reserve power supply can support a cache offload to the selected subset of devices.