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公开(公告)号:US11646057B2
公开(公告)日:2023-05-09
申请号:US17409927
申请日:2021-08-24
Applicant: Seagate Technology LLC
Inventor: Zheng Wang , Ara Patapoutian , Timothy F. Ellis , Jason Bellorado , William M. Radich
CPC classification number: G11B5/6029 , G11B5/5565 , G11B5/59622 , G11B5/607 , G11B20/10518 , G11B20/1258
Abstract: Two or more data values are received from one or more sensors of a hard disk drive. The two or more data values are indicative of a fly height of a recording head of the hard disk drive. The two or more data values are input into a machine-learning processor during operation of the hard disk drive. A fly height of the recording head during the operation of the hard drive head is adjusted based on an output of the machine learning processor.
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公开(公告)号:US20230062615A1
公开(公告)日:2023-03-02
申请号:US17409927
申请日:2021-08-24
Applicant: Seagate Technology LLC
Inventor: Zheng Wang , Ara Patapoutian , Timothy F. Ellis , Jason Bellorado , William M. Radich
Abstract: Two or more data values are received from one or more sensors of a hard disk drive. The two or more data values are indicative of a fly height of a recording head of the hard disk drive. The two or more data values are input into a machine-learning processor during operation of the hard disk drive. A fly height of the recording head during the operation of the hard drive head is adjusted based on an output of the machine learning processor
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公开(公告)号:US09865291B1
公开(公告)日:2018-01-09
申请号:US15601019
申请日:2017-05-22
Applicant: Seagate Technology LLC
Inventor: Puskal Prasad Pokharel , Gary E. Hillukka , Timothy F. Ellis
CPC classification number: G11B5/59688 , G11B5/59616
Abstract: First and second read channel logic circuits are configured to process first and second signals communicated from respective first and second readers that simultaneously read from a magnetic disk. A first servo detection circuit generates a primary servo gate based on timing data from the first reader. The primary servo gate is used for processing the first signal via the first read channel logic. A second servo detection circuit that generates a secondary servo gate based on the primary servo gate and an adjustment value. The secondary servo gate is used for processing the second signal via the second read channel logic.
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