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公开(公告)号:US20250029541A1
公开(公告)日:2025-01-23
申请号:US18777606
申请日:2024-07-19
Applicant: Sharp Display Technology Corporation
Inventor: Tatsuya Hayashi , Kohji Saitoh , Kazuhisa Yoshimoto
IPC: G09G3/20
Abstract: A display apparatus includes a timing control circuit and a power converter circuit. In response to reception of a control signal used to transition from a display mode to a pause mode from a host controller, the timing control circuit transmits a pause signal to the power control circuit. The power control circuit converts an input voltage to an output voltage at a first switching frequency in the display mode before receiving the pause signal and converts the input voltage to the output voltage at a second switching frequency in the pause mode after receiving the pause signal from the timing control circuit.
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公开(公告)号:US11967294B2
公开(公告)日:2024-04-23
申请号:US18141908
申请日:2023-05-01
Applicant: Sharp Display Technology Corporation
Inventor: Masaki Uehata , Yasuki Mori , Kohji Saitoh , Takayuki Mizunaga , Kazuya Kondoh , Takashi Nojima , Kazuhisa Yoshimoto , Kosuke Kawamoto , Hiroyuki Kito , Kazuki Nakamichi
IPC: G09G3/36
CPC classification number: G09G3/36 , G09G2310/0202 , G09G2310/0291 , G09G2310/08 , G09G2320/0209 , G09G2320/0247 , G09G2330/021
Abstract: A common electrode driver includes an inverting amplifier including a first resistor, a second resistor, and an operational amplifier, and a resistance ratio adjustment circuit that adjusts, in accordance with a length of one horizontal scan period, a resistance ratio being a ratio of a resistance value of the second resistor to a resistance value of the first resistor. A feedback voltage is provided to one end of the first resistor. The resistance ratio adjustment circuit sets the resistance ratio when second driving is performed, in which a length of one horizontal scan period is a second time longer than a first time, to be smaller than the resistance ratio when first driving is performed, in which a length of one horizontal scan period is the first time.
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公开(公告)号:US20250029540A1
公开(公告)日:2025-01-23
申请号:US18777609
申请日:2024-07-19
Applicant: Sharp Display Technology Corporation
Inventor: Tatsuya Hayashi , Kohji Saitoh , Kazuhisa Yoshimoto
IPC: G09G3/20
Abstract: A display apparatus includes a power control circuit and a timing control circuit that supplies a timing signal to a level shifter circuit. In response to reception of a control signal used to transition from a display mode to a pause mode from a host controller, the timing control circuit causes the level shifter circuit to stop outputting a gate signal by transmitting a pause signal to the power control circuit and stopping supplying the timing signal to the level shifter circuit. In response to reception of the pause signal, the power control circuit stops supplying at least part of power to be supplied to the display panel and the level shifter circuit while keeping supplying power to the timing control circuit.
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