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公开(公告)号：US20190205218A1
公开(公告)日：2019-07-04
申请号：US15979771
申请日：2018-05-15
Applicant: Tesla, Inc.
Inventor： Daniel William Bailey , David Glasco
Abstract: A parallel processing system includes at least three processors operating in parallel, state monitoring circuitry, and state reload circuitry. The state monitoring circuitry couples to the at least three parallel processors and is configured to monitor runtime states of the at least three parallel processors and identify a first processor of the at least three parallel processors having at least one runtime state error. The state reload circuitry couples to the at least three parallel processors and is configured to select a second processor of the at least three parallel processors for state reload, access a runtime state of the second processor, and load the runtime state of the second processor into the first processor. Monitoring and reload may be performed only on sub-systems of the at least three parallel processors. During reload, clocks and supply voltages of the processors may be altered. The state reload may relate to sub-systems.
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公开(公告)号：US20210263811A1
公开(公告)日：2021-08-26
申请号：US17066288
申请日：2020-10-08
Applicant: Tesla, Inc.
Inventor： Daniel William Bailey , David Glasco
Abstract: A parallel processing system includes at least three processors operating in parallel, state monitoring circuitry, and state reload circuitry. The state monitoring circuitry couples to the at least three parallel processors and is configured to monitor runtime states of the at least three parallel processors and identify a first processor of the at least three parallel processors having at least one runtime state error. The state reload circuitry couples to the at least three parallel processors and is configured to select a second processor of the at least three parallel processors for state reload, access a runtime state of the second processor, and load the runtime state of the second processor into the first processor. Monitoring and reload may be performed only on sub-systems of the at least three parallel processors. During reload, clocks and supply voltages of the processors may be altered. The state reload may relate to sub-systems.
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公开(公告)号：US12272189B2
公开(公告)日：2025-04-08
申请号：US18298152
申请日：2023-04-10
Applicant: Tesla, Inc.
Inventor： Atchyuth Gorti , David Glasco , Daniel William Bailey
Abstract: A vehicular autonomous driving system includes a fault prediction unit, including a processor and memory, configured to predict a potential future fault condition by: monitoring performance data associated with the plurality of autonomous driving components; comparing the performance data associated with the plurality of autonomous driving components to a plurality of performance thresholds; and determining the potential future fault condition for one of the plurality of autonomous driving components, when the performance data associated with the one of the plurality of autonomous driving components compare unfavorably to corresponding one of the plurality of performance thresholds.
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公开(公告)号：US12169443B2
公开(公告)日：2024-12-17
申请号：US18061620
申请日：2022-12-05
Applicant: Tesla, Inc.
Inventor： Daniel William Bailey , David Glasco
Abstract: A parallel processing system includes at least three parallel processors, state monitoring circuitry, and state reload circuitry. The state monitoring circuitry couples to the at least three parallel processors and is configured to monitor runtime states of the at least three parallel processors and identify a first processor of the at least three parallel processors having at least one runtime state error. The state reload circuitry couples to the at least three parallel processors and is configured to select a second processor of the at least three parallel processors for state reload, access a runtime state of the second processor, and load the runtime state of the second processor into the first processor. Monitoring and reload may be performed only on sub-systems of the at least three parallel processors. During reload, clocks and supply voltages of the processors may be altered. The state reload may relate to sub-systems.
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公开(公告)号：US11646868B2
公开(公告)日：2023-05-09
申请号：US17301956
申请日：2021-04-20
Applicant: Tesla, Inc.
Inventor： Thaddeus Fortenberry , Samuel Douglas Crowder , Patryk Kaminski , Daniel William Bailey , David Glasco
CPC classification number: H04L9/0819 , B60W50/02 , H04L9/0841 , H04L9/0894 , B60W2050/0005 , B60W2556/00
Abstract: An autonomous driving controller includes a plurality of parallel processors operating on common input data received from the plurality of autonomous driving sensors. Each of the plurality of parallel processors includes communication circuitry, a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The communication circuitry supports communications between the plurality of parallel processors, including inter-processor communications between the general processors of the plurality of parallel processors, communications between the SCSs of the plurality of parallel processors using SCS cryptography, and communications between the SMSs of the plurality of parallel processors using SMS cryptography, the SMS cryptography differing from the SCS cryptography. The SCS and/or the SMS may each include dedicated hardware and/or memory to support the communications.
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Patent Agency Ranking
公开(公告)号：US11640733B2
公开(公告)日：2023-05-02
申请号：US16954755
申请日：2018-12-05
Applicant: Tesla, Inc.
Inventor： Atchyuth Gorti , David Glasco , Daniel William Bailey
Abstract: A vehicular autonomous driving system includes a fault prediction unit, including a processor and memory, configured to predict a potential future fault condition by: monitoring performance data associated with the plurality of autonomous driving components; comparing the performance data associated with the plurality of autonomous driving components to a plurality of performance thresholds; and determining the potential future fault condition for one of the plurality of autonomous driving components, when the performance data associated with the one of the plurality of autonomous driving components compares unfavorably to a corresponding one of the plurality of performance thresholds.
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公开(公告)号：US20210385073A1
公开(公告)日：2021-12-09
申请号：US17301956
申请日：2021-04-20
Applicant: Tesla, Inc.
Inventor： Thaddeus Fortenberry , Samuel Douglas Crowder , Patryk Kaminski , Daniel William Bailey , David Glasco
Abstract: An autonomous driving controller includes a plurality of parallel processors operating on common input data received from the plurality of autonomous driving sensors. Each of the plurality of parallel processors includes communication circuitry, a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The communication circuitry supports communications between the plurality of parallel processors, including inter-processor communications between the general processors of the plurality of parallel processors, communications between the SCSs of the plurality of parallel processors using SCS cryptography, and communications between the SMSs of the plurality of parallel processors using SMS cryptography, the SMS cryptography differing from the SCS cryptography. The SCS and/or the SMS may each include dedicated hardware and/or memory to support the communications.
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公开(公告)号：US20230102197A1
公开(公告)日：2023-03-30
申请号：US18061620
申请日：2022-12-05
Applicant: Tesla, Inc.
Inventor： Daniel William Bailey , David Glasco
Abstract: A parallel processing system includes at least three parallel processors, state monitoring circuitry, and state reload circuitry. The state monitoring circuitry couples to the at least three parallel processors and is configured to monitor runtime states of the at least three parallel processors and identify a first processor of the at least three parallel processors having at least one runtime state error. The state reload circuitry couples to the at least three parallel processors and is configured to select a second processor of the at least three parallel processors for state reload, access a runtime state of the second processor, and load the runtime state of the second processor into the first processor. Monitoring and reload may be performed only on sub-systems of the at least three parallel processors. During reload, clocks and supply voltages of the processors may be altered. The state reload may relate to sub-systems.
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公开(公告)号：US11526409B2
公开(公告)日：2022-12-13
申请号：US17066288
申请日：2020-10-08
Applicant: Tesla, Inc.
Inventor： Daniel William Bailey , David Glasco
IPC: G06F11/00 , G06F11/07 , G06F11/14 , G06F9/52 , G06F11/267 , G06F11/18 , G06F11/16 , G06F11/30 , G06F11/20
Abstract: A parallel processing system includes at least three processors operating in parallel, state monitoring circuitry, and state reload circuitry. The state monitoring circuitry couples to the at least three parallel processors and is configured to monitor runtime states of the at least three parallel processors and identify a first processor of the at least three parallel processors having at least one runtime state error. The state reload circuitry couples to the at least three parallel processors and is configured to select a second processor of the at least three parallel processors for state reload, access a runtime state of the second processor, and load the runtime state of the second processor into the first processor. Monitoring and reload may be performed only on sub-systems of the at least three parallel processors. During reload, clocks and supply voltages of the processors may be altered. The state reload may relate to sub-systems.
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公开(公告)号：US10802929B2
公开(公告)日：2020-10-13
申请号：US15979771
申请日：2018-05-15
Applicant: Tesla, Inc.
Inventor： Daniel William Bailey , David Glasco
IPC: G06F11/00 , G06F11/14 , G06F9/52 , G06F11/267 , G06F11/18 , G06F11/16 , G06F11/07 , G06F11/30 , G06F11/20
Abstract: A parallel processing system includes at least three processors operating in parallel, state monitoring circuitry, and state reload circuitry. The state monitoring circuitry couples to the at least three parallel processors and is configured to monitor runtime states of the at least three parallel processors and identify a first processor of the at least three parallel processors having at least one runtime state error. The state reload circuitry couples to the at least three parallel processors and is configured to select a second processor of the at least three parallel processors for state reload, access a runtime state of the second processor, and load the runtime state of the second processor into the first processor. Monitoring and reload may be performed only on sub-systems of the at least three parallel processors. During reload, clocks and supply voltages of the processors may be altered. The state reload may relate to sub-systems.
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