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公开(公告)号:US11536615B2
公开(公告)日:2022-12-27
申请号:US17095800
申请日:2020-11-12
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Bradford Lawrence Hunter
Abstract: An integrated circuit includes: a resistor terminal adapted to be coupled to a first end of a first resistor; a ground terminal adapted to be coupled to a second end of the first resistor; a second resistor in series with the first resistor and having a first end and a second end, the second end coupled to the resistor terminal; a first capacitor having a first capacitor terminal and a second capacitor terminal, the first capacitor terminal is coupled to: the first end of the second resistor via a first switch; and the ground terminal via a second switch; a second capacitor having a third capacitor terminal and a fourth capacitor terminal, the third capacitor terminal is coupled to: the first end of the second resistor via a third switch; the resistor terminal via a fourth switch; and the ground terminal via a fifth switch.
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公开(公告)号:US11502700B2
公开(公告)日:2022-11-15
申请号:US17205555
申请日:2021-03-18
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Bradford Lawrence Hunter , Xiaopeng Li
Abstract: A calibratable switched-capacitor voltage reference and an associated calibration method are described. The voltage reference includes dynamic diode elements providing diode voltages, input capacitor(s) for sampling input voltages, base-emitter capacitor(s) for sampling one diode voltage with respect to a ground, dynamically trimmable capacitor(s) for sampling the one diode voltage with respect to another diode voltage, and an operational amplifier coupled to the capacitors for providing reference voltage(s) based on the sampled input and diode voltages and on trims of the trimmable capacitor(s). The voltage reference can be configured as a first integrator of a modulator stage of a delta-sigma analog-to-digital converter.
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公开(公告)号:US10784849B1
公开(公告)日:2020-09-22
申请号:US16555563
申请日:2019-08-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Bradford Lawrence Hunter , Kenneth J. Maggio , Christopher Lee Betty
IPC: H03K17/0412 , H03K17/16
Abstract: An energy storage element control circuit includes a charge transistor having a first node adapted to be coupled to an output node of the energy storage element control circuit and a second node adapted to be coupled to a terminal of an energy storage element. The energy storage control circuit also includes a boot capacitor having a first node and a second node. The energy storage element further includes a comparator that includes a first input node coupled to the first node of the charge transistor and a second input node adapted to be coupled to the terminal of the energy storage element. The comparator also includes an output node.
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公开(公告)号:US20190393707A1
公开(公告)日:2019-12-26
申请号:US16014842
申请日:2018-06-21
Applicant: Texas Instruments Incorporated
Inventor: Bradford Lawrence Hunter , Terry Lee Sculley
Abstract: Methods, systems, and apparatus to facilitate control for a low-power battery state are disclosed. An example apparatus includes a charge pump coupled to a power terminal and a charge pump switch, the charge pump switch coupled to a discharging terminal; a power supply switch circuit coupled to the power terminal and the discharging terminal, the power supply switch circuit being connected to bypass the charge pump and the charge pump switch; and a switch controller coupled to the charge pump switch and the power supply switch circuit.
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公开(公告)号:US20140376134A1
公开(公告)日:2014-12-25
申请号:US13921598
申请日:2013-06-19
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Bradford Lawrence Hunter , Richard David Nicholson
IPC: H02H9/04
CPC classification number: H02H9/044 , H01L21/761 , H01L27/0274 , H01L29/0653 , H01L29/0878 , H01L29/42368 , H01L29/7816 , H02H9/046
Abstract: In an integrated circuit device having an internal circuitry that requires voltage protection (e.g. negative voltage protection), the voltage protection is provided by a FET. In some embodiments, the source and drain of the FET are connected in series with the internal circuitry and an I/O node through which the voltage can be received (e.g. the source connected to the internal circuitry and the drain connected to the I/O node). In some embodiments, the FET is drain-extended (e.g. a drain-extended PFET).
Abstract translation: 在具有需要电压保护(例如负电压保护)的内部电路的集成电路器件中,由FET提供电压保护。 在一些实施例中,FET的源极和漏极与内部电路和可以接收电压的I / O节点串联(例如,连接到内部电路的源极和连接到I / O的漏极 节点)。 在一些实施例中,FET是漏极延伸的(例如漏极延伸的PFET)。
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公开(公告)号:US10608456B2
公开(公告)日:2020-03-31
申请号:US15840882
申请日:2017-12-13
Applicant: Texas Instruments Incorporated
Inventor: Bradford Lawrence Hunter , Wan Laan Jackie Hui
IPC: H02J7/00 , G01R31/367 , G01R31/3835
Abstract: A battery pack includes a housing, a battery, a battery pack output voltage path that includes a charge power switch and a discharge power switch, and a battery sense output. A switch can be operably coupled between the battery and the battery sense output and configured to selectively open and close a battery sense path between the battery and the battery sense output. By one approach a first control circuit controls the open and close state of the aforementioned switch (in response, for example, to a comparison of the voltage differential across the switch to a predetermined threshold such that the switch is opened when the voltage differential across the switch becomes too positive or too negative with respect to battery voltage).
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公开(公告)号:US11933859B2
公开(公告)日:2024-03-19
申请号:US17363626
申请日:2021-06-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Bradford Lawrence Hunter , Eric Frank Estes , Wallace Edward Matthews
IPC: G01R31/396 , G01R31/3835 , G01R31/52
CPC classification number: G01R31/396 , G01R31/3835 , G01R31/52
Abstract: In some examples, apparatus comprises a multiplexer (MUX) adapted to be coupled to a set of battery cells and configured to provide a voltage of a different battery cell in the set of battery cells based on a MUX control signal. Apparatus comprises a comparator coupled to the MUX and configured to compare a MUX output signal to a threshold voltage to provide a comparator output signal. Apparatus comprises a digital control circuit configured to provide the MUX control signal to the MUX, to store the comparator output signal, and to use a logic AND gate to provide an AND gate output signal based on the stored comparator output signal.
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公开(公告)号:US11018517B2
公开(公告)日:2021-05-25
申请号:US16795092
申请日:2020-02-19
Applicant: Texas Instruments Incorporated
Inventor: Bradford Lawrence Hunter , Wan Laan Jackie Hui
IPC: H02J7/00 , G01R31/367 , G01R31/3835
Abstract: A battery pack includes a housing, a battery, a battery pack output voltage path that includes a charge power switch and a discharge power switch, and a battery sense output. A switch can be operably coupled between the battery and the battery sense output and configured to selectively open and close a battery sense path between the battery and the battery sense output. By one approach a first control circuit controls the open and close state of the aforementioned switch (in response, for example, to a comparison of the voltage differential across the switch to a predetermined threshold such that the switch is opened when the voltage differential across the switch becomes too positive or too negative with respect to battery voltage).
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公开(公告)号:US10958285B2
公开(公告)日:2021-03-23
申请号:US16881642
申请日:2020-05-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Bradford Lawrence Hunter , Xiaopeng Li
IPC: H03M3/00
Abstract: A calibratable switched-capacitor voltage reference and an associated calibration method are described. The voltage reference includes dynamic diode elements providing diode voltages, input capacitor(s) for sampling input voltages, base-emitter capacitor(s) for sampling one diode voltage with respect to a ground, dynamically trimmable capacitor(s) for sampling the one diode voltage with respect to another diode voltage, and an operational amplifier coupled to the capacitors for providing reference voltage(s) based on the sampled input and diode voltages and on trims of the trimmable capacitor(s). The voltage reference can be configured as a first integrator of a modulator stage of a delta-sigma analog-to-digital converter.
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公开(公告)号:US20200059227A1
公开(公告)日:2020-02-20
申请号:US16664346
申请日:2019-10-25
Applicant: Texas Instruments Incorporated
Inventor: Bradford Lawrence Hunter , Timothy F. Murphy
IPC: H03K5/24
Abstract: A monitoring circuit is implemented for comparing a sampled voltage taken from a selected sampling capacitor and a reference voltage from a voltage buffer (150). The voltage buffer (150) is configurable according to programming provided to a programmable logic controller, PLC, (570). Comparisons may be made on a periodic basis, such as a time-division multiplexed basis, in connection with register settings in the PLC (570).
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