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公开(公告)号：US12131504B2
公开(公告)日：2024-10-29
申请号：US17538268
申请日：2021-11-30
Applicant: Texas Instruments Incorporated
Inventor： Gang Hua , Mihir Narendra Mody , Niraj Nandan , Shashank Dabral , Rajasekhar Reddy Allu , Denis Roland Beaudoin
CPC classification number: G06T7/90 , G06T1/20 , G06T2207/10024 , G06T2207/20208
Abstract: Techniques for image processing including receiving input image data, wherein the input image data includes data associated with a clear color channel, receiving a color offset value associated with a color channel, wherein color values for the color channel are not provided in the input image data, based on the color offset value, generating intermediate estimated color values for the color channel, wherein generating the intermediate estimated color values includes: clipping color values that have a magnitude greater than the color offset value, and adjusting color values that have a magnitude less than the color offset value based on the color offset value, applying a color correction function to the intermediate estimated color values based on the color offset value to determine color corrected estimated color values, and outputting the color corrected estimated color values.
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公开(公告)号：US11599975B2
公开(公告)日：2023-03-07
申请号：US16930342
申请日：2020-07-16
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Rajasekhar Reddy Allu , Niraj Nandan , Mihir Narendra Mody , Gang Hua , Brian Okchon Chae , Shashank Dabral , Hetul Sanghvi , Vikram VijayanBabu Appia , Sujith Shivalingappa
Abstract: An apparatus and method for geometrically correcting a distorted input frame and generating an undistorted output frame. The apparatus includes an external memory block that stores the input frame, a counter block to compute output coordinates of the output frame for a region based on a block size of the region, a back mapping block to generate input coordinates corresponding to each of the output coordinates, a bounding module to compute input blocks corresponding to each of the input coordinates, a buffer module to fetch data corresponding to each of the input blocks, an interpolation module to interpolate data from the buffer module and a display module that receives the interpolated data for each of the regions and stitch an output image. The method includes determining the size of the output block based on a magnification data.
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公开(公告)号：US10148888B2
公开(公告)日：2018-12-04
申请号：US15157568
申请日：2016-05-18
Applicant: Texas Instruments Incorporated
Inventor： Shashank Dabral , Rajasekhar Reddy Allu
Abstract: Disclosed examples include integrated circuits, merge circuits and methods of processing multiple-exposure image data, in which a single pre-processing circuit is used for pre-processing first input exposure data associated with a first exposure of the image, and then for pre-processing second input exposure data associated with a second exposure of the image, and the first and second pre-processed exposure data are merged to generate merged image data for tone mapping and other post-processing. An example merge circuit includes a configurable gain circuit to apply a gain to the first and/or second exposure data, as well as a configurable weighting circuit with a weight calculation circuit and a motion adaptive filter circuit to compute a first and second weight values for merging the pre-processed first and second exposure data.
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公开(公告)号：US09704269B2
公开(公告)日：2017-07-11
申请号：US14550671
申请日：2014-11-21
Applicant: Texas Instruments Incorporated
Inventor： Shashank Dabral , Hamid Rahim Sheikh , Rajasekhar Reddy Allu
CPC classification number: G06T9/00 , G06T1/20 , G06T5/007 , G06T2207/20208
Abstract: An image processor capable of processing wide-dynamic-range (WDR) image data using a native 12-bit image pipe. In one embodiment, the processor receives compressed wide-dynamic-range image data from a WDR image sensor. The compressed wide-dynamic-range image data is decompanded. Long-exposure image data is then extracted from the decompanded image data, and pre-processing is performed on the long-exposure image data. Short-exposure image data is also extracted from the decompanded image data, and pre-processing is performed on the short-exposure image data. The pre-processed long-exposure image data is merged with the pre-processed short-exposure image data. Tone mapping is performed on the merged image data.
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5.发明申请公开(公告)号：US20160189350A1
公开(公告)日：2016-06-30
申请号：US14586670
申请日：2014-12-30
Applicant: Texas Instruments Incorporated
Inventor： John William Glotzbach , Rajasekhar Reddy Allu
CPC classification number: G06T5/006 , G02B13/0015 , G06T3/0025
Abstract: Aspects of the present disclosure are drawn to a system and method for efficiently addressing the lens distortion problem in digital imaging. Aspects include a coarse mapping of the output pixel location position, further fine mapping of the pixel location position and interpolation of the pixel data. The coarse mapping of the output pixel location position and the fine mapping of the pixel location position are drawn to a back-mapping of output pixel location positions to the corresponding input pixel location positions.
Abstract translation: 本公开的方面涉及用于有效地解决数字成像中的镜头失真问题的系统和方法。 方面包括输出像素位置位置的粗略映射，像素位置位置的进一步精细映射和像素数据的内插。 将输出像素位置位置的粗略映射和像素位置位置的精细映射绘制到输出像素位置位置对相应输入像素位置位置的反向映射。
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Patent Agency Ranking
公开(公告)号：US20250053507A1
公开(公告)日：2025-02-13
申请号：US18429064
申请日：2024-01-31
Applicant: Texas Instruments Incorporated
IPC: G06F12/02
Abstract: Methods, apparatus, systems, and articles of manufacture are described corresponding to immutable configuration of memory devices. An example memory includes a memory bank including a first portion and a second portion, the second portion configured to store configuration information that specifies whether the first portion is immutable; and a controller coupled to the memory bank, the controller configured to determine whether to prevent data from being written to the first portion based on the configuration information.
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公开(公告)号：US12112399B2
公开(公告)日：2024-10-08
申请号：US17520861
申请日：2021-11-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Niraj Nandan , Rajasekhar Reddy Allu , Mihir Narendra Mody
CPC classification number: G06T1/60 , G06F9/5027 , G06F9/5066 , G06F9/544
Abstract: A lens distortion correction function operates by backmapping output images to the uncorrected, distorted input images. As a vision image processor completes processing on the image data lines needed for the lens distortion correction function to operate on a group of output, undistorted image lines, the lens distortion correction function begins processing the image data. This improves image processing pipeline delays by overlapping the operations. The vision image processor provides output image data to a circular buffer in SRAM, rather than providing it to DRAM. The lens distortion correction function operates from the image data in the circular buffer. By operating from the SRAM circular buffer, access to the DRAM for the highly fragmented backmapping image data read operations is removed, improving available DRAM bandwidth. By using a circular buffer, less space is needed in the SRAM. The improved memory operations further improve the image processing pipeline delays.
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公开(公告)号：US12111778B2
公开(公告)日：2024-10-08
申请号：US17558252
申请日：2021-12-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Mihir Mody , Niraj Nandan , Hetul Sanghvi , Brian Chae , Rajasekhar Reddy Allu , Jason A. T. Jones , Anthony Lell , Anish Reghunath
CPC classification number: G06F13/1668 , G06F13/28 , G06T1/20 , H04N5/765
Abstract: A processing accelerator includes a shared memory, and a stream accelerator, a memory-to-memory accelerator, and a common DMA controller coupled to the shared memory. The stream accelerator is configured to process a real-time data stream, and to store stream accelerator output data generated by processing the real-time data stream in the shared memory. The memory-to-memory accelerator is configured to retrieve input data from the shared memory, to process the input data, and to store, in the shared memory, memory-to-memory accelerator output data generated by processing the input data. The common DMA controller is configured to retrieve stream accelerator output data from the shared memory and transfer the stream accelerator output data to memory external to the processing accelerator; and to retrieve the memory-to-memory accelerator output data from the shared memory and transfer the memory-to-memory accelerator output data to memory external to the processing accelerator.
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公开(公告)号：US11863713B2
公开(公告)日：2024-01-02
申请号：US16669138
申请日：2019-10-30
Applicant: Texas Instruments Incorporated
Inventor： Niraj Nandan , Brian Chae , Mihir Mody , Rajasekhar Reddy Allu
CPC classification number: H04N17/004 , H04N5/144 , H04N7/183
Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for image frame freeze detection. An example hardware accelerator includes a core logic circuit to generate second image data based on first image data associated with a first image frame, the second image data corresponding to at least one of processed image data, transformed image data, or one or more image data statistics, a load/store engine (LSE) coupled to the core logic circuit, the LSE to determine a first CRC value based on the second image data obtained from the core logic circuit, and a first interface coupled to a second interface, the second interface coupled to memory, the first interface to transmit the first CRC value obtained from the memory to a host device.
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公开(公告)号：US11756169B2
公开(公告)日：2023-09-12
申请号：US17119714
申请日：2020-12-11
Applicant: Texas Instruments Incorporated
Inventor： Gang Hua , Rajasekhar Reddy Allu , Niraj Nandan , Mihir Narendra Mody
CPC classification number: G06T5/006 , G06T3/0093 , G06T7/60 , G06T11/40 , G06T2207/20021
Abstract: A method for error handling in a geometric correction engine (GCE) is provided that includes receiving configuration parameters by the GCE, generating, by the GCE in accordance with the configuration parameters, output blocks of an output frame based on corresponding blocks of an input frame, detecting, by the GCE, a run-time error during the generating, and reporting, by the GCE, an event corresponding to the run-time error.
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