Voltage converter with loop control

    公开(公告)号:US11509222B2

    公开(公告)日:2022-11-22

    申请号:US17130799

    申请日:2020-12-22

    Abstract: A voltage converter system includes a switch configured to switch between first and second states responsive to a first control signal. Timer circuitry is configured to generate a timing signal representing a duration of the first state based on input and output voltages of the voltage converter system. Control logic is coupled to the switch and the timer circuitry, and configured to generate the first control signal based on a second control signal. The second control signal is based on a feedback voltage and a reference voltage. Timer control circuitry is coupled to the control logic and the timer circuitry, and configured to: detect a phase difference between the first control signal and the second control signal; and adjust the timer circuitry to change the duration based on the phase difference.

    SERIAL BUS VOLTAGE COMPENSATION
    2.
    发明申请
    SERIAL BUS VOLTAGE COMPENSATION 有权
    串行总线电压补偿

    公开(公告)号:US20150100812A1

    公开(公告)日:2015-04-09

    申请号:US14144985

    申请日:2013-12-31

    Abstract: A serial bus network includes a voltage regulator, a plurality of power switches, and a voltage monitor. The voltage regulator provides power to a plurality of serial buses. Each of the serial buses provides power from the voltage regulator to a device coupled to the serial bus. Each of the power switches switches power from the voltage regulator to one of the serial buses, and includes an input terminal coupled to a voltage regulator output, and an output terminal coupled to one of the serial buses. The voltage monitor is coupled to the voltage regulator and to the output terminal of each of the power switches. The voltage monitor compares bus voltages at the output terminals of the power switches, identifies a lowest of the bus voltages, and adjusts the voltage regulator output voltage such that the identified lowest of the bus voltages is within a predetermined operational voltage range.

    Abstract translation: 串行总线网络包括电压调节器,多个电源开关和电压监视器。 电压调节器为多个串行总线提供电力。 每个串行总线将电压调节器提供给耦合到串行总线的设备。 每个电源开关将电压调节器的电源切换到串行总线之一,并且包括耦合到电压调节器输出的输入端和耦合到串行总线之一的输出端。 电压监视器耦合到电压调节器和每个电源开关的输出端子。 电压监视器比较电源开关的输出端的总线电压,识别最低的总线电压,并且调节电压调节器输出电压,使得所识别的最低总线电压在预定的工作电压范围内。

    EXCESSIVE CURRENT PROTECTION FOR BOOTSTRAP CAPACITOR CHARGING

    公开(公告)号:US20240364337A1

    公开(公告)日:2024-10-31

    申请号:US18308100

    申请日:2023-04-27

    Inventor: Weibing Jing Dan Li

    CPC classification number: H03K19/01714 H03K17/063 H03K17/08104

    Abstract: According to some aspects, a circuit, such as an integrated circuit, comprises a bootstrap capacitor terminal, a bootstrap capacitor charging circuit coupled to the bootstrap capacitor terminal; and a bootstrap capacitor charging current limiting circuit coupled to the bootstrap capacitor charging circuit. According to some aspects, the circuit comprises a capacitor terminal, a capacitor charging transistor coupled to the capacitor terminal, a capacitor charging current sensing transistor coupled to the capacitor charging transistor, a current programming transistor coupled to the capacitor charging current sensing transistor; and a capacitor current limiting transistor coupled to the capacitor charging current sensing transistor, to the current programming transistor, and to the capacitor charging transistor. According to some aspects, an apparatus comprises a memory storing instructions to cause a processor to instantiate bootstrap capacitor charging current limiting circuit features.

    Voltage converter with loop control

    公开(公告)号:US11742759B2

    公开(公告)日:2023-08-29

    申请号:US17130775

    申请日:2020-12-22

    CPC classification number: H02M3/1584 H02M1/15

    Abstract: A voltage converter system includes a switch adapted to be coupled to an inductor, and configured to switch between first and second states responsive to a control signal. Calibration circuitry is configured to generate a calibration signal, including setting the calibration signal to a particular value for a particular time responsive to a transient from a first load condition of the voltage converter system to a second load condition of the voltage converter system. Control circuitry is coupled to the calibration circuitry and configured to generate the control signal based on a combination of a feedback voltage, a reference voltage, the calibration signal, and a periodic signal.

    Serial bus voltage compensation
    5.
    发明授权
    Serial bus voltage compensation 有权
    串行总线电压补偿

    公开(公告)号:US09176556B2

    公开(公告)日:2015-11-03

    申请号:US14144985

    申请日:2013-12-31

    Abstract: A serial bus network includes a voltage regulator, a plurality of power switches, and a voltage monitor. The voltage regulator provides power to a plurality of serial buses. Each of the serial buses provides power from the voltage regulator to a device coupled to the serial bus. Each of the power switches switches power from the voltage regulator to one of the serial buses, and includes an input terminal coupled to a voltage regulator output, and an output terminal coupled to one of the serial buses. The voltage monitor is coupled to the voltage regulator and to the output terminal of each of the power switches. The voltage monitor compares bus voltages at the output terminals of the power switches, identifies a lowest of the bus voltages, and adjusts the voltage regulator output voltage such that the identified lowest of the bus voltages is within a predetermined operational voltage range.

    Abstract translation: 串行总线网络包括电压调节器,多个电源开关和电压监视器。 电压调节器为多个串行总线提供电力。 每个串行总线将电压调节器提供给耦合到串行总线的设备。 每个电源开关将电压调节器的电源切换到串行总线之一,并且包括耦合到电压调节器输出的输入端和耦合到串行总线之一的输出端。 电压监视器耦合到电压调节器和每个电源开关的输出端子。 电压监视器比较电源开关的输出端的总线电压,识别最低的总线电压,并且调节电压调节器输出电压,使得所识别的最低总线电压在预定的工作电压范围内。

    FAULT DETECTION CIRCUIT
    6.
    发明申请

    公开(公告)号:US20250110176A1

    公开(公告)日:2025-04-03

    申请号:US18477128

    申请日:2023-09-28

    Inventor: Weibing Jing

    Abstract: Fault detection circuits and methods. An example of a fault detection circuit includes a comparator configured to compare a voltage at a voltage terminal with a reference voltage, a digital logic circuit coupled to a test terminal and configured to receive, responsive to the voltage at the voltage terminal being less than the reference voltage as indicated by the comparator, a test signal, the digital logic circuit including at least one digital logic gate, and an edge detection circuit configured to (a) monitor a signal produced at an output of the at least one digital logic gate, and (b) based on the signal failing to transgress a threshold within a time period, providing a fault signal indicating detection of a fault at the test terminal.

    DETERMINATION OF VALUES INDICATIVE OF MULTIPLE PASSIVE COMPONENTS CONNECTED TO A DEVICE PIN

    公开(公告)号:US20240223082A1

    公开(公告)日:2024-07-04

    申请号:US18150149

    申请日:2023-01-04

    CPC classification number: H02M1/08 H02M3/157 H02M3/158

    Abstract: An integrated circuit (IC) includes a pin, a first passive component determination circuit, and a first switch having a first switch control input. The first switch is coupled between the first passive component determination circuit and the pin. The IC further includes a second passive component determination circuit and a second switch having a second switch control input. The second switch is coupled between the second passive component determination circuit and the pin. A logic circuit is coupled to first switch control input and to the second switch control input. The logic circuit is configured to close the first switch and open the second switch and then open the first switch and close the second switch.

    Load regulation
    8.
    发明授权

    公开(公告)号:US12027962B2

    公开(公告)日:2024-07-02

    申请号:US17565550

    申请日:2021-12-30

    CPC classification number: H02M1/0045 H02M3/158

    Abstract: A device includes an operational amplifier having a first input, a second input and an output, the operational amplifier configured to generate a first signal at the output. The device includes a reference resistor divider having a first and second resistor, a first terminal of the first resistor coupled to the second input of the operational amplifier. A second terminal of the first resistor is coupled to a first terminal of the second resistor and a second terminal of the second resistor coupled to an electrically neutral terminal. The device includes a voltage to current (V2I) converter having an input and an output, the input coupled to the output of the operational amplifier, and the V2I converter configured to generate a second signal at the output of the V2I converter. The device includes a switch coupled to the output of the V2I converter and to the reference resistor divider.

    LOAD REGULATION
    9.
    发明申请

    公开(公告)号:US20220247301A1

    公开(公告)日:2022-08-04

    申请号:US17565550

    申请日:2021-12-30

    Abstract: A device includes an operational amplifier having a first input, a second input and an output, the operational amplifier configured to generate a first signal at the output. The device includes a reference resistor divider having a first and second resistor, a first terminal of the first resistor coupled to the second input of the operational amplifier. A second terminal of the first resistor is coupled to a first terminal of the second resistor and a second terminal of the second resistor coupled to an electrically neutral terminal. The device includes a voltage to current (V2I) converter having an input and an output, the input coupled to the output of the operational amplifier, and the V2I converter configured to generate a second signal at the output of the V2I converter. The device includes a switch coupled to the output of the V2I converter and to the reference resistor divider.

    VOLTAGE REGULATOR WITH ON-TIME EXTENSION
    10.
    发明公开

    公开(公告)号:US20230275511A1

    公开(公告)日:2023-08-31

    申请号:US18143798

    申请日:2023-05-05

    CPC classification number: H02M3/158 H02M1/14 H03K2005/00078

    Abstract: A voltage regulator circuit includes a high side (HS) transistor having a control input and a low side (LS) transistor having a control input. The LS transistor is coupled to the HS transistor at a switching terminal. A comparator has first and second inputs and an output. A first resistor is coupled to the switching terminal. A second resistor is coupled between the first resistor and the second input of the comparator. A capacitor is coupled between a second resistor terminal of the second resistor and ground. A switch has first and second switch terminals and a control input. The first switch terminal is coupled to the first resistor terminal of the second resistor, and the second switch terminal is coupled to the second resistor terminal. A delay circuit has an input and an output. The output of the delay circuit is coupled to the control input of the switch.

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