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公开(公告)号：US20240407268A1
公开(公告)日：2024-12-05
申请号：US18804178
申请日：2024-08-14
Applicant: Texas Instruments Incorporated
Inventor： Fuchao Wang , Christopher Eric Brannon , William David French , Dok Won Lee
Abstract: Apparatus, and their methods of manufacture, including an integrated circuit device having metallization layers for interconnecting underlying electronic devices. Contacts contact conductors of an uppermost one of the metallization layers. A planarized first dielectric layer covers the contacts and the uppermost one of the metallization layers. An anisotropic magnetoresistive (AMR) stack is on the first dielectric layer between vertically aligned portions of an etch stop layer formed on the first dielectric layer and a second dielectric layer formed on the etch stop layer. Vias extend through the first dielectric layer to electrically connect the AMR stack and the contacts. A chemical-mechanical planarization (CMP) stop layer is on the AMR stack. A third dielectric layer is on the CMP stop layer. A passivation layer contacts the second dielectric layer portions, the third dielectric layer, and each opposing end of the AMR stack and the CMP stop layer.
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公开(公告)号：US11782102B2
公开(公告)日：2023-10-10
申请号：US17508706
申请日：2021-10-22
Applicant: Texas Instruments Incorporated
Inventor： Keith Ryan Green , Erika Lynn Mazotti , William David French , Ricky Alan Jackson
CPC classification number: G01R33/072 , G01R33/0052 , G01R33/077 , H10N52/01 , H10N52/101 , H10N52/80
Abstract: A microelectronic device has a Hall sensor that includes a Hall plate in a semiconductor material. The Hall sensor includes contact regions in the semiconductor material, contacting the Hall plate. The Hall sensor includes an isolation structure with a dielectric material contacting the semiconductor material, on at least two opposite sides of each of the contact regions. The isolation structure is laterally separated from the contact regions by gaps. The Hall sensor further includes a conductive spacer over the gaps, the conductive spacer being separated from the semiconductor material by an insulating layer.
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公开(公告)号：US10705159B2
公开(公告)日：2020-07-07
申请号：US16502317
申请日：2019-07-03
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Erika Lynn Mazotti , Dok Won Lee , William David French , Byron J R Shulver , Thomas Dyer Bonifield , Ricky Alan Jackson , Neil Gibson
Abstract: An integrated fluxgate device has a magnetic core disposed over a semiconductor substrate. A first winding is disposed in a first metallization level above and a second metallization level below the magnetic core, and is configured to generate a first magnetic field in the magnetic core. A second winding is disposed in the first and second metallization levels and is configured to generate a second magnetic field in the magnetic core. A third winding is disposed in the first and second metallization levels and is configured to sense a magnetic field in the magnetic core that is the net of the first and second magnetic fields.
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公开(公告)号：US10345397B2
公开(公告)日：2019-07-09
申请号：US15169639
申请日：2016-05-31
Applicant: Texas Instruments Incorporated
Inventor： Erika Lynn Mazotti , Dok Won Lee , William David French , Byron J R Shulver , Thomas Dyer Bonifield , Ricky Alan Jackson , Neil Gibson
Abstract: An integrated fluxgate device has a magnetic core on a control circuit. The magnetic core has a volume and internal structure sufficient to have low magnetic noise and low non-linearity. A stress control structure is disposed proximate to the magnetic core. An excitation winding, a sense winding and a compensation winding are disposed around the magnetic core. An excitation circuit disposed in the control circuit is coupled to the excitation winding, configured to provide current at high frequency to the excitation winding sufficient to generate a saturating magnetic field in the magnetic core during each cycle at the high frequency. An isolation structure is disposed between the magnetic core and the windings, sufficient to enable operation of the excitation winding and the sense winding at the high frequency at low power.
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公开(公告)号：US20170271399A1
公开(公告)日：2017-09-21
申请号：US15070413
申请日：2016-03-15
Applicant: Texas Instruments Incorporated
Inventor： Dok Won Lee , William David French , Keith Ryan Green
CPC classification number: H01L27/22 , H01L43/04 , H01L43/065 , H01L43/14
Abstract: Disclosed examples provide wafer-level integration of magnetoresistive sensors and Hall-effect sensors in a single integrated circuit, in which one or more vertical and/or horizontal Hall sensors are formed on or in a substrate along with transistors and other circuitry, and a magnetoresistive sensor circuit is formed in the IC metallization structure.
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Patent Agency Ranking
公开(公告)号：US12069956B2
公开(公告)日：2024-08-20
申请号：US17487877
申请日：2021-09-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Fuchao Wang , Christopher Eric Brannon , William David French , Dok Won Lee
CPC classification number: H10N50/01 , G01R33/0052 , G01R33/096 , H01L21/30604 , H10N50/10 , H10N50/80 , H10N59/00
Abstract: Apparatus, and their methods of manufacture, including an integrated circuit device having metallization layers for interconnecting underlying electronic devices. Contacts contact conductors of an uppermost one of the metallization layers. A planarized first dielectric layer covers the contacts and the uppermost one of the metallization layers. An anisotropic magnetoresistive (AMR) stack is on the first dielectric layer between vertically aligned portions of an etch stop layer formed on the first dielectric layer and a second dielectric layer formed on the etch stop layer. Vias extend through the first dielectric layer to electrically connect the AMR stack and the contacts. A chemical-mechanical planarization (CMP) stop layer is on the AMR stack. A third dielectric layer is on the CMP stop layer. A passivation layer contacts the second dielectric layer portions, the third dielectric layer, and each opposing end of the AMR stack and the CMP stop layer.
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公开(公告)号：US20230096573A1
公开(公告)日：2023-03-30
申请号：US17487877
申请日：2021-09-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Fuchao Wang , Christopher Eric Brannon , William David French , Dok Won Lee
IPC: H01L43/12 , H01L43/02 , H01L21/306 , G01R33/09
Abstract: Apparatus, and their methods of manufacture, including an integrated circuit device having metallization layers for interconnecting underlying electronic devices. Contacts contact conductors of an uppermost one of the metallization layers. A planarized first dielectric layer covers the contacts and the uppermost one of the metallization layers. An anisotropic magnetoresistive (AMR) stack is on the first dielectric layer between vertically aligned portions of an etch stop layer formed on the first dielectric layer and a second dielectric layer formed on the etch stop layer. Vias extend through the first dielectric layer to electrically connect the AMR stack and the contacts. A chemical-mechanical planarization (CMP) stop layer is on the AMR stack. A third dielectric layer is on the CMP stop layer. A passivation layer contacts the second dielectric layer portions, the third dielectric layer, and each opposing end of the AMR stack and the CMP stop layer.
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公开(公告)号：US20180202837A1
公开(公告)日：2018-07-19
申请号：US15407990
申请日：2017-01-17
Applicant: Texas Instruments Incorporated
Inventor： William David French , Dok Won Lee
IPC: G01D5/16
CPC classification number: G01D5/145
Abstract: An integrated AMR angular sensor includes a first sensor resistor and a second sensor resistor. The first sensor resistor and the second sensor resistor each has a plurality of magnetoresistive segments containing magnetoresistive material that are electrically coupled in series. The magnetoresistive segments of each sensor resistor are parallel/anti-parallel to each other. The magnetoresistive segments of the second sensor resistor are perpendicular to the magnetoresistive segments of the first sensor resistor. The first magnetoresistive segments are divided into a first group and a second group, which are disposed in a balanced distribution relative to a sensor central point of the integrated AMR angular sensor. Similarly, the second magnetoresistive segments are divided into a first group and a second group, which are disposed in a balanced distribution relative to the sensor central point.
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公开(公告)号：US20170316875A1
公开(公告)日：2017-11-02
申请号：US15399937
申请日：2017-01-06
Applicant: Texas Instruments Incorporated
Inventor： Dok Won Lee , Sudtida Lavangkul , Erika Lynn Mazotti , William David French
IPC: H01F27/34 , H01L43/02 , H01L27/22 , H01L23/522 , G01R33/00 , H01F27/28 , H01F27/24 , G01R33/04 , H01L43/12 , H01L23/528
CPC classification number: H01F27/346 , G01R33/0029 , G01R33/04 , H01F27/24 , H01F27/28 , H01L23/5226 , H01L23/528 , H01L27/22 , H01L43/02 , H01L43/12
Abstract: An integrated fluxgate device, which includes a magnetic core, an excitation coil, and a sense coil. The magnetic core has a longitudinal edge and a terminal edge. The excitation coil coils around the longitudinal edge of the magnetic core, and the excitation coil has a first number of excitation coil members within a proximity of the terminal edge. The sense coil coils around the longitudinal edge of the magnetic core, and the sense coil has a second number of sense coil members within the proximity of the terminal edge. For reducing fluxgate noise, the second number of sense coil members may be less than the first number of excitation coil members within the proximity of the terminal edge.
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公开(公告)号：US09577185B1
公开(公告)日：2017-02-21
申请号：US15141003
申请日：2016-04-28
Applicant: Texas Instruments Incorporated
Inventor： Dok Won Lee , Sudtida Lavangkul , Erika Lynn Mazotti , William David French
IPC: H01L27/02 , H01L43/12 , H01L27/22 , H01L43/02 , H01L23/528 , H01L23/522 , G01R33/04
CPC classification number: H01F27/346 , G01R33/0029 , G01R33/04 , H01F27/24 , H01F27/28 , H01L23/5226 , H01L23/528 , H01L27/22 , H01L43/02 , H01L43/12
Abstract: An integrated fluxgate device, which includes a magnetic core, an excitation coil, and a sense coil. The magnetic core has a longitudinal edge and a terminal edge. The excitation coil coils around the longitudinal edge of the magnetic core, and the excitation coil has a first number of excitation coil members within a proximity of the terminal edge. The sense coil coils around the longitudinal edge of the magnetic core, and the sense coil has a second number of sense coil members within the proximity of the terminal edge. For reducing fluxgate noise, the second number of sense coil members may be less than the first number of excitation coil members within the proximity of the terminal edge.
Abstract translation: 集成磁通门装置，其包括磁芯，励磁线圈和感测线圈。 磁芯具有纵向边缘和末端边缘。 励磁线圈围绕磁芯的纵向边缘缠绕，并且励磁线圈在端子边缘附近具有第一数量的励磁线圈构件。 感测线圈围绕磁芯的纵向边缘缠绕，并且感测线圈在端子边缘附近具有第二数量的感测线圈构件。 为了减小磁通门噪声，第二数量的感测线圈构件可以小于在端子边缘附近的第一数量的励磁线圈构件。
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