公开(公告)号：US20240038599A1

公开(公告)日：2024-02-01

申请号：US17876176

申请日：2022-07-28

Applicant: Tokyo Electron Limited

Inventor： Kevin Ryan

IPC: H01L21/66 ,  H01L23/00 ,  H01L23/544

CPC classification number: H01L22/14 ,  H01L22/32 ,  H01L24/08 ,  H01L24/06 ,  H01L24/80 ,  H01L23/544 ,  H01L2224/08145 ,  H01L2224/0612 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2223/54426

Abstract: Semiconductor devices and corresponding methods of manufacturing the same are disclosed. For example, a semiconductor device includes a first semiconductor substrate and a second semiconductor substrate. A first portion of a test structure is disposed over the first substrate and a second portion of the test structure is disposed over the second substrate. The test structure includes intentionally offset portions. The performance characteristics of the intestinally offset portions are measured to detect an alignment of the first portion of the test structure and a second portion of the test structure.

公开(公告)号：US20240243006A1

公开(公告)日：2024-07-18

申请号：US18388564

申请日：2023-11-10

Applicant: Tokyo Electron Limited

Inventor： Scott Lefevre ,  Arkalgud Sitaram ,  Kevin Ryan ,  Ilseok Son ,  Panupong Jaipan

IPC: H01L21/762 ,  H01L21/321

CPC classification number: H01L21/76251 ,  H01L21/3212 ,  H01L21/76243

Abstract: In some implementations, a method may include providing a silicon on insulator (SOI) substrate having a first semiconductor layer, a buried oxide layer over the first semiconductor region, and a second semiconductor region over the buried oxide, the second semiconductor region having a plurality of recesses exposing the underlying buried oxide, each recess having a shape and size configured to accommodate a die. In addition, the device may include bonding a plurality of semiconductor dies to the buried oxide through the plurality of recesses.

公开(公告)号：US20230343606A1

公开(公告)日：2023-10-26

申请号：US17727495

申请日：2022-04-22

Applicant: Tokyo Electron Limited

Inventor： Kevin Ryan ,  Hirokazu Aizawa ,  Kaoru Maekawa ,  Satohiko Hoshino ,  Yoshihiro Tsutsumi

IPC: H01L21/56 ,  H01L23/544 ,  H01L21/683

CPC classification number: H01L21/568 ,  H01L21/561 ,  H01L23/544 ,  H01L21/6835 ,  H01L2223/54426 ,  H01L24/96

Abstract: A method for making forming a semiconductor package comprises forming a plurality of alignment marks in or on a carrier substrate; positioning and bonding a plurality of semiconductor dies to the carrier substrate based on the plurality of alignment marks; further processing the plurality of semiconductor dies into a reconstituted wafer; and decoupling the reconstituted wafer from the carrier substrate at an interface using a laser source. The alignment marks are interposed between the interface and the laser source.