公开(公告)号：US20160063173A1

公开(公告)日：2016-03-03

申请号：US14935464

申请日：2015-11-09

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Chih Chang ,  Kuo-Hsun Huang ,  Chao-Yao Chiang

IPC: G06F17/50 ,  G03F1/36

CPC classification number: G03F1/36 ,  G03F1/68

Abstract: The optical proximity correction verification method includes loading a layout data to be verified to a processor, loading a reference layout data to the processor. The processor performs a first stage Boolean operation on the layout data to be verified to generate a first verified data. The processor performs a layout versus layout verification on the first verified data by using a user-defined verification tool of optical proximity correction data in a database to generate second verified data according to the reference layout data. The processor performs a second stage Boolean operation on the second verified data to generate a third verified data if the layout versus layout verification is successfully performed. The processor performs a Boolean check on the third verified data to generate fourth verified data using the reference layout data.

Abstract translation: 光学邻近校正验证方法包括将要验证的布局数据加载到处理器，将参考布局数据加载到处理器。 处理器对待验证的布局数据执行第一阶段布尔运算以生成第一验证数据。 处理器通过使用数据库中的光学邻近校正数据的用户定义的验证工具对第一验证数据执行布局与布局验证，以根据参考布局数据生成第二验证数据。 如果成功执行布局对布局验证，则处理器对第二验证数据执行第二阶段布尔运算以产生第三验证数据。 处理器对第三个验证数据执行布尔检查，以使用参考布局数据生成第四个验证数据。

公开(公告)号：US09213800B1

公开(公告)日：2015-12-15

申请号：US14474180

申请日：2014-08-31

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Chih Chang ,  Kuo-Hsun Huang ,  Chao-Yao Chiang

IPC: G06F17/50

CPC classification number: G03F1/36 ,  G03F1/68

Abstract: The optical proximity correction verification method includes loading a layout data to be verified to a processor, loading a reference layout data to the processor. The processor performs a first stage Boolean operation on the layout data to be verified to generate first verified data. The processor performs a layout versus layout verification on the first verified data to generate second verified data by using the reference layout data. If the layout versus layout verification is successfully performed, the processor performs a second stage Boolean operation on the second verified data to generate third verified data. By using the reference layout data, the processor performs a Boolean check on the third verified data to generate fourth verified data.

Abstract translation: 光学邻近校正验证方法包括将要验证的布局数据加载到处理器，将参考布局数据加载到处理器。 处理器对待验证的布局数据执行第一阶段布尔运算，以生成第一验证数据。 处理器对第一验证数据执行布局与布局验证，以通过使用参考布局数据生成第二验证数据。 如果布局与布局验证成功执行，则处理器对第二验证数据执行第二阶段布尔运算以产生第三验证数据。 通过使用参考布局数据，处理器对第三验证数据执行布尔检查，以生成第四验证数据。

公开(公告)号：US09330229B2

公开(公告)日：2016-05-03

申请号：US14935464

申请日：2015-11-09

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Chih Chang ,  Kuo-Hsun Huang ,  Chao-Yao Chiang

IPC: G06F17/50 ,  G03F1/36

CPC classification number: G03F1/36 ,  G03F1/68

Abstract: The optical proximity correction verification method includes loading a layout data to be verified to a processor, loading a reference layout data to the processor. The processor performs a first stage Boolean operation on the layout data to be verified to generate a first verified data. The processor performs a layout versus layout verification on the first verified data by using a user-defined verification tool of optical proximity correction data in a database to generate second verified data according to the reference layout data. The processor performs a second stage Boolean operation on the second verified data to generate a third verified data if the layout versus layout verification is successfully performed. The processor performs a Boolean check on the third verified data to generate fourth verified data using the reference layout data.

Abstract translation: 光学邻近校正验证方法包括将要验证的布局数据加载到处理器，将参考布局数据加载到处理器。 处理器对待验证的布局数据执行第一阶段布尔运算以生成第一验证数据。 处理器通过使用数据库中的光学邻近校正数据的用户定义的验证工具对第一验证数据执行布局与布局验证，以根据参考布局数据生成第二验证数据。 如果成功执行布局对布局验证，则处理器对第二验证数据执行第二阶段布尔运算以产生第三验证数据。 处理器对第三个验证数据执行布尔检查，以使用参考布局数据生成第四个验证数据。