公开(公告)号：US09748333B2

公开(公告)日：2017-08-29

申请号：US14583575

申请日：2014-12-26

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shin-Chi Chen ,  Chih-Yueh Li ,  Pei-Ching Yeh ,  Chih-Jen Lin

IPC: H01L27/088 ,  H01L21/764 ,  H01L29/06 ,  H01L29/78 ,  H01L21/28

CPC classification number: H01L29/0653 ,  H01L21/28123 ,  H01L21/76224 ,  H01L29/78

Abstract: A semiconductor pattern structure includes a substrate, an input/output (I/O) region defined on the substrate, a core region defined on the substrate, a dummy region defined on the substrate, and a gate electrode formed on the substrate. The dummy region is formed between the I/O region and the core region. The gate electrode crosses the I/O region and covers a portion of the dummy region.

公开(公告)号：US10276443B2

公开(公告)日：2019-04-30

申请号：US15445928

申请日：2017-02-28

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shin-Chi Chen ,  Chih-Chung Chen ,  An-Chi Liu ,  Chih-Yueh Li ,  Pei-Ching Yeh ,  Tsung-Chieh Yang

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L21/311 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/306 ,  H01L21/762 ,  H01L29/66 ,  H01L29/78

Abstract: A method of removing a fin structure includes providing a substrate. A fin structure extends from the substrate. A mask layer is disposed on a top surface of the fin structure. An organic dielectric layer covers the substrate, the fin structure and the mask layer. A first etching process is performed to entirely remove the mask layer by taking the organic dielectric layer as a mask. Then a second etching process is performed to remove the fin structure. The first etching process is preferably an anisotropic etching process, and the second etching process is an isotropic etching process.

公开(公告)号：US20180226403A1

公开(公告)日：2018-08-09

申请号：US15445928

申请日：2017-02-28

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shin-Chi Chen ,  Chih-Chung Chen ,  An-Chi Liu ,  Chih-Yueh Li ,  Pei-Ching Yeh ,  Tsung-Chieh Yang

IPC: H01L27/088 ,  H01L29/06 ,  H01L21/8234 ,  H01L21/311 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/306

CPC classification number: H01L27/0886 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/31133 ,  H01L21/31144 ,  H01L21/823431 ,  H01L29/0649 ,  H01L29/66795 ,  H01L29/7851

Abstract: A method of removing a fin structure includes providing a substrate. A fin structure extends from the substrate. A mask layer is disposed on a top surface of the fin structure. An organic dielectric layer covers the substrate, the fin structure and the mask layer. A first etching process is performed to entirely remove the mask layer by taking the organic dielectric layer as a mask. Then a second etching process is performed to remove the fin structure. The first etching process is preferably an anisotropic etching process, and the second etching process is an isotropic etching process.

公开(公告)号：US20160148878A1

公开(公告)日：2016-05-26

申请号：US14583575

申请日：2014-12-26

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shin-Chi Chen ,  Chih-Yueh Li ,  Pei-Ching Yeh ,  Chih-Jen Lin

IPC: H01L23/00 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L29/0653 ,  H01L21/28123 ,  H01L21/76224 ,  H01L29/78

Abstract: A semiconductor pattern structure includes a substrate, an input/output (I/O) region defined on the substrate, a core region defined on the substrate, a dummy region defined on the substrate, and a gate electrode formed on the substrate. The dummy region is formed between the I/O region and the core region. The gate electrode crosses the I/O region and covers a portion of the dummy region.

Abstract translation: 半导体图案结构包括基板，限定在基板上的输入/输出（I / O）区域，限定在基板上的芯区域，限定在基板上的虚拟区域和形成在基板上的栅电极。 在I / O区域和核心区域之间形成虚拟区域。 栅电极与I / O区域交叉并覆盖虚拟区域的一部分。