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公开(公告)号：US12127413B2
公开(公告)日：2024-10-22
申请号：US18113070
申请日：2023-02-23
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Kun-Ju Li , Tai-Cheng Hou , Hsin-Jung Liu , Fu-Yu Tsai , Bin-Siang Tsai , Chau-Chung Hou , Yu-Lung Shih , Ang Chan , Chih-Yueh Li , Chun-Tsen Lu
CPC classification number: H10B61/00 , G11C11/161 , H01F10/3254 , H01F41/34 , H10N50/01 , H10N50/80
Abstract: A semiconductor device includes a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, a first ultra low-k (ULK) dielectric layer on the first MTJ and the second MTJ, a passivation layer on the first ULK dielectric layer, and a second ULK dielectric layer on the passivation layer. Preferably, the first ULK dielectric layer includes a first thickness, the passivation layer between the first MTJ and the second MTJ includes a second thickness, the passivation layer on top of the first MTJ includes a third thickness, and the second thickness is greater than the third thickness
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公开(公告)号：US12120962B2
公开(公告)日：2024-10-15
申请号：US18504176
申请日：2023-11-08
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Tai-Cheng Hou , Fu-Yu Tsai , Bin-Siang Tsai , Da-Jun Lin , Chau-Chung Hou , Wei-Xin Gao
Abstract: A method for fabricating a semiconductor device includes the steps of: providing a substrate, wherein the substrate comprises a MRAM region and a logic region; forming a magnetic tunneling junction (MTJ) on the MRAM region; forming a top electrode on the MTJ; and then performing a flowable chemical vapor deposition (FCVD) process to form a first inter-metal dielectric (IMD) layer around the top electrode and the MTJ.
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公开(公告)号：US12014995B2
公开(公告)日：2024-06-18
申请号：US17369936
申请日：2021-07-07
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Da-Jun Lin , Chin-Chia Yang , Tai-Cheng Hou , Fu-Yu Tsai , Bin-Siang Tsai
IPC: H01L23/00 , H01L21/02 , H01L23/522 , H01L29/417
CPC classification number: H01L23/562 , H01L21/02164 , H01L21/0217 , H01L21/02348 , H01L23/5226 , H01L29/41725
Abstract: A warpage-reducing semiconductor structure includes a wafer. The wafer includes a front side and a back side. Numerous semiconductor elements are disposed at the front side. A silicon oxide layer is disposed at the back side. A UV-transparent silicon nitride layer covers and contacts the silicon oxide layer. The refractive index of the UV-transparent silicon nitride layer is between 1.55 and 2.10.
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公开(公告)号：US10916694B2
公开(公告)日：2021-02-09
申请号：US16255754
申请日：2019-01-23
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Hui-Lin Wang , Tai-Cheng Hou , Wei-Xin Gao , Fu-Yu Tsai , Chin-Yang Hsieh , Chen-Yi Weng , Jing-Yin Jhang , Bin-Siang Tsai , Kun-Ju Li , Chih-Yueh Li , Chia-Lin Lu , Chun-Lung Chen , Kun-Yuan Liao , Yu-Tsung Lai , Wei-Hao Huang
IPC: H01L43/08 , H01L41/47 , H01L21/768 , H01L43/02 , H01L21/762
Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and forming a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
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公开(公告)号：US20210020693A1
公开(公告)日：2021-01-21
申请号：US16544923
申请日：2019-08-20
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Chih-Wei Kuo , Tai-Cheng Hou , Yu-Tsung Lai , Jiunn-Hsiung Liao
Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate; forming a first top electrode on the first MTJ and a second top electrode on the second MTJ; forming a passivation layer on the first MTJ and the second MTJ; removing part of the passivation layer so that a top surface of all of the remaining passivation layer is lower than a top surface of the first electrode; and forming a ultra low-k (ULK) dielectric layer on the first MTJ and the second MTJ.
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Patent Agency Ranking
公开(公告)号：US20200212290A1
公开(公告)日：2020-07-02
申请号：US16255754
申请日：2019-01-23
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Hui-Lin Wang , Tai-Cheng Hou , Wei-Xin Gao , Fu-Yu Tsai , Chin-Yang Hsieh , Chen-Yi Weng , Jing-Yin Jhang , Bin-Siang Tsai , Kun-Ju Li , Chih-Yueh Li , Chia-Lin Lu , Chun-Lung Chen , Kun-Yuan Liao , Yu-Tsung Lai , Wei-Hao Huang
IPC: H01L41/47 , H01L21/762 , H01L43/02 , H01L21/768
Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and forming a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
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公开(公告)号：US20250008842A1
公开(公告)日：2025-01-02
申请号：US18885729
申请日：2024-09-15
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Tai-Cheng Hou , Fu-Yu Tsai , Bin-Siang Tsai , Da-Jun Lin , Chau-Chung Hou , Wei-Xin Gao
Abstract: A method for fabricating a semiconductor device includes the steps of: providing a substrate, wherein the substrate comprises a MRAM region and a logic region; forming a magnetic tunneling junction (MTJ) on the MRAM region; forming a top electrode on the MTJ; and then performing a flowable chemical vapor deposition (FCVD) process to form a first inter-metal dielectric (IMD) layer around the top electrode and the MTJ.
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公开(公告)号：US20240423094A1
公开(公告)日：2024-12-19
申请号：US18815799
申请日：2024-08-26
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Da-Jun Lin , Tai-Cheng Hou , Bin-Siang Tsai , Ting-An Chien
Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a top electrode on the MTJ, a trapping layer in the top electrode for trapping hydrogen, a first inter-metal dielectric (IMD) layer on the MTJ, and a first metal interconnection in the first IMD layer and on the top electrode. Preferably, a top surface of the trapping layer is lower than a bottom surface of the first IMD layer.
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公开(公告)号：US12108681B2
公开(公告)日：2024-10-01
申请号：US18376820
申请日：2023-10-04
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Da-Jun Lin , Tai-Cheng Hou , Bin-Siang Tsai , Ting-An Chien
Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a top electrode on the MTJ, a trapping layer in the top electrode for trapping hydrogen, a first inter-metal dielectric (IMD) layer on the MTJ, and a first metal interconnection in the first IMD layer and on the top electrode. Preferably, a top surface of the trapping layer is lower than a bottom surface of the first IMD layer.
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公开(公告)号：US11871677B2
公开(公告)日：2024-01-09
申请号：US17180876
申请日：2021-02-22
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Tai-Cheng Hou , Fu-Yu Tsai , Bin-Siang Tsai , Da-Jun Lin , Chau-Chung Hou , Wei-Xin Gao
Abstract: A method for fabricating a semiconductor device includes the steps of: providing a substrate, wherein the substrate comprises a MRAM region and a logic region; forming a magnetic tunneling junction (MTJ) on the MRAM region; forming a top electrode on the MTJ; and then performing a flowable chemical vapor deposition (FCVD) process to form a first inter-metal dielectric (IMD) layer around the top electrode and the MTJ.
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