公开(公告)号：US10381056B2

公开(公告)日：2019-08-13

申请号：US15992130

申请日：2018-05-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tien-Yu Lu ,  Chun-Hsien Huang ,  Ching-Cheng Lung ,  Yu-Tse Kuo ,  Shou-Sian Chen ,  Koji Nii ,  Yuichiro Ishii

IPC: G11C8/16 ,  G11C8/08 ,  H01L27/11 ,  G11C11/412 ,  G11C7/12

Abstract: A dual port static random access memory (DPSRAM) cell includes a first power line, a first bit line and a second bit line. The first power line is disposed between a first word line and a second word line. The first bit line is disposed between the first word line and the first power line. The second bit line is disposed between the second word line and the first power line.

公开(公告)号：US09761302B1

公开(公告)日：2017-09-12

申请号：US15092613

申请日：2016-04-06

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tien-Yu Lu ,  Chang-Hung Chen ,  Chun-Hsien Huang ,  Han-Tsun Wang ,  Jheng-Tai Yan ,  Yu-Tse Kuo

IPC: G11C11/34 ,  G11C11/417 ,  G11C11/412 ,  H01L27/105

CPC classification number: G11C11/417 ,  G11C8/16 ,  G11C11/412 ,  G11C11/418 ,  G11C11/419 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/1104

Abstract: A SRAM cell includes a first pass-gate device and a second-pass gate device comprising a first conductivity type, a first pull-down device and a second pull-down device comprising the first conductivity type, and a first pull-up device and a second pull-up device comprising a second conductivity type complementary to the first conductivity type. The first pass-gate device and the second pass-gate device respectively include first lightly-doped drains (hereinafter abbreviated as LDDs. The first pull-down device and the second pull-down device respectively include second LDDs. And a dosage of the first LDDs is different from a dosage of the second LDDs.

公开(公告)号：US09401366B1

公开(公告)日：2016-07-26

申请号：US14792636

申请日：2015-07-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tien-Yu Lu ,  Chang-Hung Chen ,  Yu-Tse Kuo ,  Chun-Hsien Huang

IPC: G11C11/00 ,  H01L27/088 ,  H01L27/11 ,  H01L27/02 ,  H01L29/06 ,  G11C11/412 ,  H01L21/84 ,  H01L27/105 ,  H01L29/423

CPC classification number: H01L27/1104 ,  G11C11/412 ,  G11C11/4125 ,  H01L21/845 ,  H01L27/1052 ,  H01L29/42392

Abstract: The present invention provides a layout pattern of an 8-transistor static random access memory (8T-SRAM), at least including a first diffusion region, a second diffusion region and a third diffusion region disposed on a substrate, a critical dimension region being disposed between the first diffusion region and the third diffusion region. The critical dimension region directly contacts the first diffusion region and the third diffusion region, a first extra diffusion region, a second extra diffusion region and a third extra diffusion region disposed surrounding and directly contacting the first diffusion region, the second diffusion region and the third diffusion region respectively. The first, the second and the third extra diffusion region are not disposed within the critical dimension region.

Abstract translation: 本发明提供了至少包括第一扩散区域，第二扩散区域和设置在衬底上的第三扩散区域的8-晶体管静态随机存取存储器（8T-SRAM）的布局图案，设置临界尺寸区域 在第一扩散区域和第三扩散区域之间。 临界尺寸区域直接接触第一扩散区域和第三扩散区域，第一额外扩散区域，第二额外扩散区域和设置在第一扩散区域，第二扩散区域和第三扩散区域周围并直接接触的第三额外扩散区域 扩散区。 第一，第二和第三附加扩散区域不设置在临界尺寸区域内。

公开(公告)号：US20190206459A1

公开(公告)日：2019-07-04

申请号：US15992130

申请日：2018-05-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tien-Yu Lu ,  Chun-Hsien Huang ,  Ching-Cheng Lung ,  Yu-Tse Kuo ,  Shou-Sian Chen ,  Koji Nii ,  Yuichiro Ishii

IPC: G11C8/16 ,  G11C8/08 ,  G11C7/12 ,  G11C11/412 ,  H01L27/11

CPC classification number: G11C8/16 ,  G11C5/025 ,  G11C7/12 ,  G11C7/18 ,  G11C8/08 ,  G11C8/14 ,  G11C11/412 ,  G11C11/418 ,  G11C11/419 ,  H01L27/11

Abstract: A dual port static random access memory (DPSRAM) cell includes a first power line, a first bit line and a second bit line. The first power line is disposed between a first word line and a second word line. The first bit line is disposed between the first word line and the first power line. The second bit line is disposed between the second word line and the first power line.