N-way ring combiner/divider
    1.
    发明授权

    公开(公告)号:US11437698B2

    公开(公告)日:2022-09-06

    申请号:US16619459

    申请日:2018-06-05

    Abstract: A magnet-less multi-port ring combiner comprises a set of ports extending from the circumference of the magnet-less multi-port ring combiner. The set of ports are positioned at ¼ increments around the circumference of the magnet-less multi-port ring combiner. The set of ports comprise a first input port configured to receive a first input signal and a second input port configured to receive a second input signal, wherein the first input signal is 180° out-of-phase with the second input signal. The N-way magnet-less multi-port combiner comprises more than four ports.

    Temperature sensors and methods of use

    公开(公告)号:US11233503B2

    公开(公告)日:2022-01-25

    申请号:US16825128

    申请日:2020-03-20

    Abstract: Embodiments of the disclosure are drawn to a low-voltage temperature sensor. The temperature sensor may include a waveform generator, a complementary-to-absolute-temperature (CTAT) voltage generator, a voltage reference, two comparators, and digital logic. A waveform of the waveform generator may be compared to both the CTAT voltage and the voltage reference. The output of the comparison of the CTAT and the waveform may be a pulse-width modulated signal that is temperature-dependent. The output of the comparison of the voltage reference and the waveform may be a signal with constant pulse width. The digital logic may receive the pulsed signals and take a ratio of the two signals to determine a temperature.

    VOLTAGE REFERENCES AND DESIGN THEREOF
    4.
    发明申请

    公开(公告)号:US20200310482A1

    公开(公告)日:2020-10-01

    申请号:US16825071

    申请日:2020-03-20

    Abstract: Embodiments of the disclosure are drawn to voltage reference circuits and methods of designing same. The voltage reference circuit may include a main stage and one or more auxiliary stages. The output of the main stage may be a reference voltage. The auxiliary stages may provide a feedback voltage that reduces a temperature dependence of the reference voltage. Each stage may include two or more transistors. The transistors may operate in a sub-threshold mode to provide the reference voltage.

    TEMPERATURE SENSORS AND METHODS OF USE
    5.
    发明申请

    公开(公告)号:US20200313664A1

    公开(公告)日:2020-10-01

    申请号:US16825128

    申请日:2020-03-20

    Abstract: Embodiments of the disclosure are drawn to a low-voltage temperature sensor. The temperature sensor may include a waveform generator, a complementary-to-absolute-temperature (CTAT) voltage generator, a voltage reference, two comparators, and digital logic. A waveform of the waveform generator may be compared to both the CTAT voltage and the voltage reference. The output of the comparison of the CTAT and the waveform may be a pulse-width modulated signal that is temperature-dependent. The output of the comparison of the voltage reference and the waveform may be a signal with constant pulse width. The digital logic may receive the pulsed signals and take a ratio of the two signals to determine a temperature.

    Apparatuses and methods for hybrid switched capacitor array power amplifiers

    公开(公告)号:US11258410B2

    公开(公告)日:2022-02-22

    申请号:US16528956

    申请日:2019-08-01

    Abstract: Embodiments of the disclosure are drawn to apparatuses a hybrid switched capacitor array power amplifier (H-SCPA). The H-SCPA may have an array of storage elements divided into sub-arrays. A first sub-array may be configured to receive a delta sigma modulated (DSM) signal. A second sub-array may be configured to receive a Nyquist-rate signal. The H-SCPA may provide an output based on the received DSM and Nyquist-rate signals. The first sub-array and second sub-array may have different architectures. The DSM signal may represent the least significant bits of the signal and the Nyquist-rate signal may represent the most significant bits of the signal.

    ULTRA-COMPACT INDUCTOR MADE OF 3D DIRAC SEMIMETAL

    公开(公告)号:US20210288136A1

    公开(公告)日:2021-09-16

    申请号:US16817077

    申请日:2020-03-12

    Abstract: Ultra-compact inductor devices for use in integrated circuits (e.g., RF ICs) that use 3-dimensional Dirac materials for providing the inductor. Whereas inductors currently require significant real estate on an integrated circuit, because they require use of an electrically conductive winding around an insulative core, or such metal deposited in a spiral geometry, the present devices can be far more compact, occupying significantly less space on an integrated circuit. For example, an ultra-compact inductor that could be included in an integrated circuit may include a 3-dimensional Dirac material formed into a geometric shape capable of inductance (e.g., as simple as a stripe or series of stripes of such material), deposited on a substantially non-conductive (i.e., insulative) substrate, on which the Dirac material in the selected geometric shape is positioned. Low temperature manufacturing methods compatible with CMOS manufacturing are also provided.

    Ultra-compact inductor made of 3D Dirac semimetal

    公开(公告)号:US11563078B2

    公开(公告)日:2023-01-24

    申请号:US16817077

    申请日:2020-03-12

    Abstract: Ultra-compact inductor devices for use in integrated circuits (e.g., RF ICs) that use 3-dimensional Dirac materials for providing the inductor. Whereas inductors currently require significant real estate on an integrated circuit, because they require use of an electrically conductive winding around an insulative core, or such metal deposited in a spiral geometry, the present devices can be far more compact, occupying significantly less space on an integrated circuit. For example, an ultra-compact inductor that could be included in an integrated circuit may include a 3-dimensional Dirac material formed into a geometric shape capable of inductance (e.g., as simple as a stripe or series of stripes of such material), deposited on a substantially non-conductive (i.e., insulative) substrate, on which the Dirac material in the selected geometric shape is positioned. Low temperature manufacturing methods compatible with CMOS manufacturing are also provided.

    Apparatuses and methods for transmission beamforming

    公开(公告)号:US10797773B2

    公开(公告)日:2020-10-06

    申请号:US16789098

    申请日:2020-02-12

    Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for transmission beamforming. A multiphase beam steering transmitter may include a transmitter array of multiple transmitters. A transmitter may include a multiphase logic decoder that directly controls a power amplifier to perform a vector addition of a beam phase and amplitude. A transmitter of the array may include a multiphase clock generator that outputs basis phases with embedded phase modulation data which are output to the multiphase logic decoder. The multiphase clock generator may receive a modulated clock signal. The PA may be a multiphase switched capacitor power amplifier. The multiphase logic decoder may output two phases adjacent to a desired phase as inputs to clocks of the SCPA. The multiphase logic decoder may further output a control signal that determines which cells in the SCPA are activated and when.

    APPARATUSES AND METHODS FOR TRANSMISSION BEAMFORMING

    公开(公告)号:US20200259540A1

    公开(公告)日:2020-08-13

    申请号:US16789098

    申请日:2020-02-12

    Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for transmission beamforming. A multiphase beam steering transmitter may include a transmitter array of multiple transmitters. A transmitter may include a multiphase logic decoder that directly controls a power amplifier to perform a vector addition of a beam phase and amplitude. A transmitter of the array may include a multiphase clock generator that outputs basis phases with embedded phase modulation data which are output to the multiphase logic decoder. The multiphase clock generator may receive a modulated clock signal. The PA may be a multiphase switched capacitor power amplifier. The multiphase logic decoder may output two phases adjacent to a desired phase as inputs to clocks of the SCPA. The multiphase logic decoder may further output a control signal that determines which cells in the SCPA are activated and when.

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